Automatic verification of finite-state concurrent systems using temporal logic specifications
ACM Transactions on Programming Languages and Systems (TOPLAS)
Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Current trends in concurrency. Overviews and tutorials
An approach to systems verification
Journal of Automated Reasoning
Verifying a static RAM design by logic simulation
Proceedings of the fifth MIT conference on Advanced research in VLSI
Formal hardware verification methods: a survey
Formal Methods in System Design - Special issue on computer-aided verification: general methods
Verification of a multiprocessor cache protocol using simulation relations and higher-order logic
Formal Methods in System Design - Special issue on computer-aided verification: special methods I
A methodology for formal hardware verification, with application to microprocessors
A methodology for formal hardware verification, with application to microprocessors
Computer-aided verification of coordinating processes: the automata-theoretic approach
Computer-aided verification of coordinating processes: the automata-theoretic approach
Symbolic Model Checking
Behavioral synthesis methodology for HDL-based specification and validation
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Design-flow and synthesis for ASICs: a case study
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Model checking in industrial hardware design
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
A scalable formal verification methodology for pipelined microprocessors
DAC '96 Proceedings of the 33rd annual Design Automation Conference
An efficient assertion checker for combinational properties
DAC '97 Proceedings of the 34th annual Design Automation Conference
Verifying correct pipeline implementation for microprocessors
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Formal verification in hardware design: a survey
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Model Checking Large Software Specifications
IEEE Transactions on Software Engineering
Refinement and Property Checking in High-Level Synthesis using Attribute Grammars
CHARME '99 Proceedings of the 10th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
Run-time consistency checking in discrete simulation models
EDTC '95 Proceedings of the 1995 European conference on Design and Test
Some Recent Advances in Software and Hardware Logic Simulation
VLSID '97 Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications
A Formal Verification Methodology for Checking Data Integrity
Proceedings of the conference on Design, Automation and Test in Europe - Volume 3
FPgen - a test generation framework for datapath floating-point verification
HLDVT '03 Proceedings of the Eighth IEEE International Workshop on High-Level Design Validation and Test Workshop
Large-scale formal verification in practice: a process perspective
Proceedings of the 34th International Conference on Software Engineering
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