Fitting formal methods into the design cycle
DAC '94 Proceedings of the 31st annual Design Automation Conference
Test program generation for functional verification of PowerPC processors in IBM
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
User defined coverage—a tool supported methodology for design verification
DAC '98 Proceedings of the 35th annual Design Automation Conference
Functional verification methodology for microprocessors using the Genesys test-program generator
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Chaff: engineering an efficient SAT solver
Proceedings of the 38th annual Design Automation Conference
ACM Transactions on Mathematical Software (TOMS)
Verifying the SRT Division Algorithm Using Theorem Proving Techniques
Formal Methods in System Design
Solving the generalized mask constraint for test generation of binary floating point add operation
Theoretical Computer Science - Real numbers and computers
Number-Theoretic Test Generation for Directed Rounding
ARITH '99 Proceedings of the 14th IEEE Symposium on Computer Arithmetic
Solving Range Constraints for Binary Floating-Point Instructions
ARITH '03 Proceedings of the 16th IEEE Symposium on Computer Arithmetic (ARITH-16'03)
A Decimal Floating-Point Specification
ARITH '01 Proceedings of the 15th IEEE Symposium on Computer Arithmetic
Generation and Analysis of Hard to Round Cases for Binary Floating Point Division
ARITH '01 Proceedings of the 15th IEEE Symposium on Computer Arithmetic
Formal Verification of the Pentium® 4 Floating-Point Multiplier
Proceedings of the conference on Design, automation and test in Europe
Advanced Analysis Techniques for Cross-Product Coverage
IEEE Transactions on Computers
Decimal floating-point in z9: an implementation and testing perspective
IBM Journal of Research and Development
Standardization and testing of implementations of mathematical functions in floating point numbers
Programming and Computing Software
Constraint-based random stimuli generation for hardware verification
IAAI'06 Proceedings of the 18th conference on Innovative applications of artificial intelligence - Volume 2
Integration of CP and compilation techniques for instruction sequence test generation
CPAIOR'08 Proceedings of the 5th international conference on Integration of AI and OR techniques in constraint programming for combinatorial optimization problems
Functional verification of the IBM system z10 processor chipset
IBM Journal of Research and Development
Symbolic crosschecking of floating-point and SIMD code
Proceedings of the sixth conference on Computer systems
A probabilistic analysis of coverage methods
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Threadmill: a post-silicon exerciser for multi-threaded processors
Proceedings of the 48th Design Automation Conference
HVC'11 Proceedings of the 7th international Haifa Verification conference on Hardware and Software: verification and testing
Injecting floating-point testing knowledge into test generators
HVC'11 Proceedings of the 7th international Haifa Verification conference on Hardware and Software: verification and testing
Leveraging accelerated simulation for floating-point regression
HVC'12 Proceedings of the 8th international conference on Hardware and Software: verification and testing
Extensible environment for test program generation for microprocessors
Programming and Computing Software
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FPgen is a new test generation framework targeted toward the verification of the floating point (FP) datapath, through the generation of test cases. This framework provides the capacity to define virtually any architectural FP coverage model, consisting of verification tasks. The tool supplies strong constraint solving capabilities, allowing the generation of random tests that target these tasks. We present an overview of FPgen's functionality, describe the results of its use for the verification of several FP units, and compare its efficiency with existing test generators.