A grammatical view of logic programming
A grammatical view of logic programming
Fitting formal methods into the design cycle
DAC '94 Proceedings of the 31st annual Design Automation Conference
Attribute grammar paradigms—a high-level methodology in language implementation
ACM Computing Surveys (CSUR)
Recent developments in high-level synthesis
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Incorporating multi-pass attribute grammars for the high-level synthesis of ASICs
SAC '98 Proceedings of the 1998 ACM symposium on Applied Computing
AGENDA: an attribute grammar driven enviornment for the design automation of digital systems
Proceedings of the conference on Design, automation and test in Europe
Introduction to the Scheduling Problem
IEEE Design & Test
Hardware compilation using attribute grammars
Proceedings of the IFIP WG 10.5 International Conference on Correct Hardware Design and Verification Methods: Advances in Hardware Design and Verification
Exploiting the Use of VHDL Specifications in the AGENDA High-Level Synthesis Environment
EUROMICRO '98 Proceedings of the 24th Conference on EUROMICRO - Volume 1
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Recent advances in fabrication technology have pushed the digital designers' perspective towards higher levels of abstraction. Previous work has shown that attribute grammars, used in traditional compiler construction, can also be effectively adopted to describe in a formal and uniform way high-level hardware compilation heuristics, their main advantages being modularity and declarative notation. In this paper, a more abstract form of attribute grammars, relational attribute grammars, are further applied as a framework over which formal hardware verification is performed along with synthesis. The overall hardware design methodology proposed is a novel idea that supports provable correct designs.