Verifying a static RAM design by logic simulation

A methodology for hardware verification based on logic simulation

Journal of the ACM (JACM)

Sequential circuit verification using symbolic model checking

DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference

Fitting formal methods into the design cycle

DAC '94 Proceedings of the 31st annual Design Automation Conference

Validating PowerPC Microprocessor Custom Memories

IEEE Design & Test

Using Abstract Specifications to Verify PowerPCTM Custom Memories by Symbolic Trajectory Evaluation

CHARME '01 Proceedings of the 11th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods