A new polynomial-time algorithm for linear programming
Combinatorica
Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Edge-valued binary decision diagrams for multi-level hierarchical verification
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
BDD based decomposition of logic functions with application to FPGA synthesis
DAC '93 Proceedings of the 30th international Design Automation Conference
Computers and Intractability: A Guide to the Theory of NP-Completeness
Computers and Intractability: A Guide to the Theory of NP-Completeness
Computing the maximum power cycles of a sequential circuit
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Streaming BDD manipulation for large-scale combinatorial problems
Proceedings of the conference on Design, automation and test in Europe
IEEE Transactions on Computers
Factored Edge-Valued Binary Decision Diagrams
Formal Methods in System Design
Formal Verification Using Edge-Valued Binary Decision Diagrams
IEEE Transactions on Computers
Mathematical framework for representing discrete functions as word-level polynomials
HLDVT '03 Proceedings of the Eighth IEEE International Workshop on High-Level Design Validation and Test Workshop
TED+: a data structure for microprocessor verification
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
BDDs in a branch and cut framework
WEA'05 Proceedings of the 4th international conference on Experimental and Efficient Algorithms
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