Automatic verification of finite-state concurrent systems using temporal logic specifications
ACM Transactions on Programming Languages and Systems (TOPLAS)
Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
A structural induction theorem for processes
Proceedings of the eighth annual ACM Symposium on Principles of distributed computing
Proceedings of the Fourth Annual Symposium on Logic in computer science
Verifying properties of large sets of processes with network invariants
Proceedings of the international workshop on Automatic verification methods for finite state systems
Verification of synchronous sequential machines based on symbolic execution
Proceedings of the international workshop on Automatic verification methods for finite state systems
Analysis of discrete event coordination
REX workshop Proceedings on Stepwise refinement of distributed systems: models, formalisms, correctness
Handbook of theoretical computer science (vol. B)
Sequential circuit verification using symbolic model checking
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Representing circuits more efficiently in symbolic model checking
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Model checking and abstraction
POPL '92 Proceedings of the 19th ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Sequential Circuit Design Using Synthesis and Optimization
ICCD '92 Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors
Model Checking and Modular Verification
CONCUR '91 Proceedings of the 2nd International Conference on Concurrency Theory
Compositional Minimization of Finite State Systems
CAV '90 Proceedings of the 2nd International Workshop on Computer Aided Verification
Reducing BDD size by exploiting functional dependencies
DAC '93 Proceedings of the 30th international Design Automation Conference
New techniques for efficient verification with implicitly conjoined BDDs
DAC '94 Proceedings of the 31st annual Design Automation Conference
Verification of electronic systems
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Verification techniques for cache coherence protocols
ACM Computing Surveys (CSUR)
Formula-Dependent Equivalence for Compositional CTL Model Checking
Formal Methods in System Design
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