Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Introduction to algorithms
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DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
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EURO-DAC '94 Proceedings of the conference on European design automation
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ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
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ASP-DAC '95 Proceedings of the 1995 Asia and South Pacific Design Automation Conference
Improving the Variable Ordering of OBDDs Is NP-Complete
IEEE Transactions on Computers
EXPLORER: an interactive floorplanner for design space exploration
EURO-DAC '96/EURO-VHDL '96 Proceedings of the conference on European design automation
Dynamic variable ordering for ordered binary decision diagrams
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Evolutionary algorithms for VLSI CAD
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Genetic Algorithms Plus Data Structures Equals Evolution Programs
Genetic Algorithms Plus Data Structures Equals Evolution Programs
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On variable ordering of binary decision diagrams for the application of multi-level logic synthesis
EURO-DAC '91 Proceedings of the conference on European design automation
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Evolutionary Computation
Pattern Recognition Letters
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In this paper we present an approach to learning heuristics based on Genetic Programming (GP) which can be applied to problems in the VLSI CAD area. GP is used to develop a heuristic that is applied to the problem instance instead of directly solving the problem by application of GP. The GP-based heuristic learning method is applied to one concrete field from the area of VLSI CAD, i.e. minimization of Binary Decision Diagrams (BDDs). Experimental results are given in order to demonstrate that the GP-based method leads to high quality results that outperform previous methods while the run-times of the resulting heuristics do not increase. Furthermore, we show that by clever adjustment of parameters, further improvements such as the saving of about 50% of the run-time for the learning phase can be achieved.