Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Science of Computer Programming
Translation Validation: From SIGNAL to C
Correct System Design, Recent Insight and Advances, (to Hans Langmaack on the occasion of his retirement from his professorship at the University of Kiel)
The Linear Time - Branching Time Spectrum II
CONCUR '93 Proceedings of the 4th International Conference on Concurrency Theory
Concurrency and Automata on Infinite Sequences
Proceedings of the 5th GI-Conference on Theoretical Computer Science
A synchronous language at work: the story of Lustre
MEMOCODE '05 Proceedings of the 2nd ACM/IEEE International Conference on Formal Methods and Models for Co-Design
Designing Embedded Systems with the SIGNAL Programming Language: Synchronous, Reactive Specification
Designing Embedded Systems with the SIGNAL Programming Language: Synchronous, Reactive Specification
Formal verification of synchronous data-flow program transformations toward certified compilers
Frontiers of Computer Science: Selected Publications from Chinese Universities
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In this paper, adopting the translation validation approach, we present a formal verification process to prove the correctness of compiler transformations on systems of polychronous equations. We encode the source programs and the transformations with polynomial dynamical systems and prove that the transformations preserve the abstract clocks and clock relations of the source programs. In order to carry out the correctness proof, an appropriate relation called refinement and an automated proof method are presented. Each individual transformation or optimization step of the compiler is followed by our validation process which proves the correctness of this running. The compiler will continue its work if and only if the correctness is proved positively. In this paper, the highly optimizing, industrial compiler from the synchronous language SIGNAL to C is addressed.