Combinational verification based on high-level functional specifications

  • Authors:
  • E. I. Goldberg;Y. Kukimoto;R. K. Brayton

  • Affiliations:
  • Cadence Berkeley Laboratories, Berkeley, CA;Department of Electrical Engineering and Computer Sciences, University of California, Berkeley, CA;Department of Electrical Engineering and Computer Sciences, University of California, Berkeley, CA

  • Venue:
  • Proceedings of the conference on Design, automation and test in Europe
  • Year:
  • 1998

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Abstract

We present a new combinational verification technique where the functional specification of a circuit under verification is utilized to simplify the verification task. The main idea is to assign to each primary input a general function, called a coordinate function, instead of a single variable function as in most BDD-based techniques. BDDs of intermediate nodes are then constructed based on these coordinate functions in a topological order from primary inputs to primary outputs. Coordinate functions depend on primary input variables and extra variables. Therefore combinational verification is performed not over the set of primary input variables but over the extended set of variables. Coordinate functions are chosen in such a way that in the process of computing intermediate functions the dependency on the primary input variables is gradually replaced with that on the extra variables, thereby making boolean functions associated with primary outputs simple functions only in terms of the extra variables. We show that such a smart choice of coordinate functions is possible with the help of the high-level functional specification of the circuit.