Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Don't cares in multi-level network optimization
Don't cares in multi-level network optimization
Symmetry detection and dynamic variable ordering of decision diagrams
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Boolean matching using generalized Reed-Muller forms
DAC '94 Proceedings of the 31st annual Design Automation Conference
Limits of using signatures for permutation independent Boolean comparison
ASP-DAC '95 Proceedings of the 1995 Asia and South Pacific Design Automation Conference
Generalized Reed-Muller Forms as a Tool to Detect Symmetries
IEEE Transactions on Computers
Detection of symmetry of Boolean functions represented by ROBDDs
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Boolean matching for large libraries
DAC '98 Proceedings of the 35th annual Design Automation Conference
Constructive library-aware synthesis using symmetries
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Logic Synthesis and Verification Algorithms
Logic Synthesis and Verification Algorithms
Unveiling the ISCAS-85 Benchmarks: A Case Study in Reverse Engineering
IEEE Design & Test
Technology mapping using boolean matching and don't care sets
EURO-DAC '90 Proceedings of the conference on European design automation
BDD minimization using symmetries
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
On determining symmetries in inputs of logic circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Solving difficult SAT instances in the presence of symmetry
Proceedings of the 39th annual Design Automation Conference
An anytime symmetry detection algorithm for ROBDDs
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
Post-placement rewiring and rebuffering by exhaustive search for functional symmetries
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Proceedings of the 43rd annual Design Automation Conference
Exploiting K-Distance Signature for Boolean Matching and G-Symmetry Detection
Proceedings of the 43rd annual Design Automation Conference
Postplacement rewiring by exhaustive search for functional symmetries
ACM Transactions on Design Automation of Electronic Systems (TODAES)
A transform-parametric approach to Boolean matching
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Dimension-reducible Boolean functions based on affine spaces
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Formal Methods in System Design
Extending symmetric variable-pair transitivities using state-space transformations
Proceedings of the great lakes symposium on VLSI
Generalized Boolean symmetries through nested partition refinement
Proceedings of the International Conference on Computer-Aided Design
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In this paper we take a fresh look at the notion of symmetries in Boolean functions. Our studies are motivated by the fact that the classical characterization of symmetries based on invariance under variable swaps is a special case of a more general invariance based on unrestricted variable permutations. We propose a generalization of classical symmetry that allows for the simultaneous swap of ordered and unordered groups of variables, and show that it captures more of a function's invariant permutations without undue computational requirements. We apply the new symmetry definition to analyze a large set of benchmark circuits and provide extensive data showing the existence of substantial symmetries in those circuits. Specific case studies of several of these benchmarks reveal additional insights about their functional structure and how it might be related to their circuit structure.