Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Symbolic model checking: 1020 states and beyond
Information and Computation - Special issue: Selections from 1990 IEEE symposium on logic in computer science
New techniques for efficient verification with implicitly conjoined BDDs
DAC '94 Proceedings of the 31st annual Design Automation Conference
High performance BDD package by exploiting memory hierarchy
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Implementation of an efficient parallel BDD package
DAC '96 Proceedings of the 33rd annual Design Automation Conference
IEEE Transactions on Software Engineering - Special issue on formal methods in software practice
A new scheme for memory-efficient probabilistic verification
IFIP TC6/ 6.1 international conference on formal description techniques IX/protocol specification, testing and verification XVI on Formal description techniques IX : theory, application and tools: theory, application and tools
An Analysis of Bitstate Hashing
Formal Methods in System Design
Binary decision diagrams on network of workstation
ICCD '96 Proceedings of the 1996 International Conference on Computer Design, VLSI in Computers and Processors
Protocol Verification as a Hardware Design Aid
ICCD '92 Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors
Distributed-Memory Model Checking with SPIN
Proceedings of the 5th and 6th International SPIN Workshops on Theoretical and Practical Aspects of SPIN Model Checking
Improved probabilistic verification by hash compaction
CHARME '95 Proceedings of the IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
Exploiting Transition Locality in Automatic Verification
CHARME '01 Proceedings of the 11th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
Using Magnatic Disk Instead of Main Memory in the Murphi Verifier
CAV '98 Proceedings of the 10th International Conference on Computer Aided Verification
Reliable Hashing without Collosion Detection
CAV '93 Proceedings of the 5th International Conference on Computer Aided Verification
Parallelizing the Murphi Verifier
CAV '97 Proceedings of the 9th International Conference on Computer Aided Verification
Better Verification Through Symmetry
CHDL '93 Proceedings of the 11th IFIP WG10.2 International Conference sponsored by IFIP WG10.2 and in cooperation with IEEE COMPSOC on Computer Hardware Description Languages and their Applications
A Probabilistic Approach to Automatic Verification of Concurrent Systems
APSEC '01 Proceedings of the Eighth Asia-Pacific on Software Engineering Conference
Dynamic Delayed Duplicate Detection for External Memory Model Checking
SPIN '08 Proceedings of the 15th international workshop on Model Checking Software
Layered Duplicate Detection in External-Memory Model Checking
SPIN '08 Proceedings of the 15th international workshop on Model Checking Software
Linear-time disk-based implicit graph search
Journal of the ACM (JACM)
Hierarchical Adaptive State Space Caching Based on Level Sampling
TACAS '09 Proceedings of the 15th International Conference on Tools and Algorithms for the Construction and Analysis of Systems: Held as Part of the Joint European Conferences on Theory and Practice of Software, ETAPS 2009,
"To store or not to store" reloaded: reclaiming memory on demand
FMICS'06/PDMC'06 Proceedings of the 11th international workshop, FMICS 2006 and 5th international workshop, PDMC conference on Formal methods: Applications and technology
Automatic verification of a turbogas control system with the murϕ verifier
HSCC'03 Proceedings of the 6th international conference on Hybrid systems: computation and control
Exploiting hub states in automatic verification
ATVA'05 Proceedings of the Third international conference on Automated Technology for Verification and Analysis
Time-Efficient model checking with magnetic disk
TACAS'05 Proceedings of the 11th international conference on Tools and Algorithms for the Construction and Analysis of Systems
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The main obstruction to automatic verification of Finite State Systems is the huge amount of memory required to complete the verification task (state explosion). This motivates research on distributed as well as disk based verification algorithms.In this paper we present a disk based Breadth First Explicit State Space Exploration algorithm as well as an implementation of it within the Mur驴 verifier. Our algorithm exploits transition locality (i.e. the statistical fact that most transitions lead to unvisited states or to recently visited states) to decrease disk read accesses thus reducing the time overhead due to disk usage.A disk based verification algorithm for Mur驴 has been already proposed in the literature. To measure the time speed up due to locality exploitation we compared our algorithm with such previously proposed algorithm. Our experimental results show that our disk based verification algorithm is typically more than 10 times faster than such previously proposed disk based verification algorithm.To measure the time overhead due to disk usage we compared our algorithm with RAM based verification using the (standard) Mur驴 verifier with enough memory to complete the verification task. Our experimental results show that even when using 1/10 of the RAM needed to complete verification, our disk based algorithm is only between 1.4 and 5.3 times (3 times on average) slower than (RAM) Mur驴 with enough RAM memory to complete the verification task at hand.Using our disk based Mur驴 we were able to complete verification of a protocol with about 109 reachable states. This would require more than 5 gigabytes of RAM using RAM based Mur驴.