An improved protocol reachability analysis technique
Software—Practice & Experience
Design and validation of computer protocols
Design and validation of computer protocols
IEEE Transactions on Software Engineering - Special issue on formal methods in software practice
A new scheme for memory-efficient probabilistic verification
IFIP TC6/ 6.1 international conference on formal description techniques IX/protocol specification, testing and verification XVI on Formal description techniques IX : theory, application and tools: theory, application and tools
On Limits and Possibilities of Automated Protocol Analysis
Proceedings of the IFIP WG6.1 Seventh International Conference on Protocol Specification, Testing and Verification VII
Coverage Preserving Reduction Strategies for Reachability Analysis
Proceedings of the IFIP TC6/WG6.1 Twelth International Symposium on Protocol Specification, Testing and Verification XII
Proving the value of formal methods
Proceedings of the 7th IFIP WG6.1 International Conference on Formal Description Techniques VII
Formal Methods at AT&T - An Industrial Usage Report
FORTE '91 Proceedings of the IFIP TC6/WG6.1 Fourth International Conference on Formal Description Techniques for Distributed Systems and Communication Protocols: Formal Description Techniques, IV
Improved probabilistic verification by hash compaction
CHARME '95 Proceedings of the IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
CAV '92 Proceedings of the Fourth International Workshop on Computer Aided Verification
Reliable Hashing without Collosion Detection
CAV '93 Proceedings of the 5th International Conference on Computer Aided Verification
Designing executable abstractions
FMSP '98 Proceedings of the second workshop on Formal methods in software practice
Directed explicit model checking with HSF-SPIN
SPIN '01 Proceedings of the 8th international SPIN workshop on Model checking of software
Efficient Computation and Representation of Large Reachability Sets for Composed Automata
Discrete Event Dynamic Systems
Randomization Helps in LTL Model Checking
PAPM-PROBMIV '01 Proceedings of the Joint International Workshop on Process Algebra and Probabilistic Methods, Performance Modeling and Verification
Exploiting Transition Locality in the Disk Based Mur phi Verifier
FMCAD '02 Proceedings of the 4th International Conference on Formal Methods in Computer-Aided Design
Model Checking: A Tutorial Overview
MOVEP '00 Proceedings of the 4th Summer School on Modeling and Verification of Parallel Processes
A Sweep-Line Method for State Space Exploration
TACAS 2001 Proceedings of the 7th International Conference on Tools and Algorithms for the Construction and Analysis of Systems
Exploiting Transition Locality in Automatic Verification
CHARME '01 Proceedings of the 11th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
A Generalised Sweep-Line Method for Safety Properties
FME '02 Proceedings of the International Symposium of Formal Methods Europe on Formal Methods - Getting IT Right
Theory and Practice of Time-Space Trade-Offs in Memory Limited Search
KI '01 Proceedings of the Joint German/Austrian Conference on AI: Advances in Artificial Intelligence
Model checking: a tutorial overview
Modeling and verification of parallel processes
More efficient on-the-fly LTL verification with Tarjan's algorithm
Theoretical Computer Science - Tools and algorithms for the construction and analysis of systems (TACAS 2004)
Memory arbiter synthesis and verification for a radar memory interface card
Nordic Journal of Computing
Symmetry in temporal logic model checking
ACM Computing Surveys (CSUR)
Parallel Randomized State-Space Search
ICSE '07 Proceedings of the 29th international conference on Software Engineering
SPIN '08 Proceedings of the 15th international workshop on Model Checking Software
The High Road to Formal Validation
ABZ '08 Proceedings of the 1st international conference on Abstract State Machines, B and Z
Scenario-based timing verification of multiprocessor embedded applications
ACM Transactions on Design Automation of Electronic Systems (TODAES)
ASAP: An Extensible Platform for State Space Analysis
PETRI NETS '09 Proceedings of the 30th International Conference on Applications and Theory of Petri Nets
Modelling and analysing the SDL description of the ISDN-DSS1 protocol
ICATPN'00 Proceedings of the 21st international conference on Application and theory of petri nets
"To store or not to store" reloaded: reclaiming memory on demand
FMICS'06/PDMC'06 Proceedings of the 11th international workshop, FMICS 2006 and 5th international workshop, PDMC conference on Formal methods: Applications and technology
The ComBack method: extending hash compaction with backtracking
ICATPN'07 Proceedings of the 28th international conference on Applications and theory of Petri nets and other models of concurrency
Minimal counterexample generation for SPIN
Proceedings of the 14th international SPIN conference on Model checking software
An automatic method for the dynamic construction of abstractions of states of a formal model
Cybernetics and Systems Analysis
Flash memory efficient LTL model checking
Science of Computer Programming
Efficient explicit-state model checking on general purpose graphics processors
SPIN'10 Proceedings of the 17th international SPIN conference on Model checking software
Directed model checking for B: an evaluation and new techniques
SBMF'10 Proceedings of the 13th Brazilian conference on Formal methods: foundations and applications
External memory breadth-first search with delayed duplicate detection on the GPU
MoChArt'10 Proceedings of the 6th international conference on Model checking and artificial intelligence
Modeling and verification of a protocol for operational support using coloured petri nets
PETRI NETS'11 Proceedings of the 32nd international conference on Applications and theory of Petri Nets
Depth bounded explicit-state model checking
Proceedings of the 18th international SPIN conference on Model checking software
Exploiting hub states in automatic verification
ATVA'05 Proceedings of the Third international conference on Automated Technology for Verification and Analysis
A note on on-the-fly verification algorithms
TACAS'05 Proceedings of the 11th international conference on Tools and Algorithms for the Construction and Analysis of Systems
Truly on-the-fly LTL model checking
TACAS'05 Proceedings of the 11th international conference on Tools and Algorithms for the Construction and Analysis of Systems
Formal verification of a Cooperative Automatic Repeat reQuest MAC protocol
Computer Standards & Interfaces
The sweep-line state space exploration method
Theoretical Computer Science
Generating tests from EFSM models using guided model checking and iterated search refinement
FATES'06/RV'06 Proceedings of the First combined international conference on Formal Approaches to Software Testing and Runtime Verification
A graphical approach to component-based and extensible model checking platforms
Transactions on Petri Nets and Other Models of Concurrency V
Distributed LTL Model Checking with Hash Compaction
Electronic Notes in Theoretical Computer Science (ENTCS)
| Hi-index | 0.00 |
The bitstate hashing, or supertrace, technique wasintroduced in 1987 as a method to increase the qualityof verification by reachability analyses for applicationsthat defeat analysis by traditional means because of their size.Since then, the technique has been included in many researchverification tools, and was adopted in tools thatare marketed commercially.It is therefore important that we understand well how andwhy the method works, what its limitations are, and how itcompares with alternative methods over a broad range ofproblem sizes.The original motivation for the bitstate hashing techniquewas based on empirical evidence of its effectiveness.In this paper we provide an analytical argument.We compare the technique with two alternatives thathave been proposed in the recent literature.We also describe a sequential bitstate hashing techniquethat can be of value when confronted with very largeproblem sizes.