Exploiting Transition Locality in the Disk Based Mur phi Verifier
FMCAD '02 Proceedings of the 4th International Conference on Formal Methods in Computer-Aided Design
Enhancing random walk state space exploration
Proceedings of the 10th international workshop on Formal methods for industrial critical systems
Resource-Aware Verification Using Randomized Exploration of Large State Spaces
SPIN '08 Proceedings of the 15th international workshop on Model Checking Software
Hierarchical Adaptive State Space Caching Based on Level Sampling
TACAS '09 Proceedings of the 15th International Conference on Tools and Algorithms for the Construction and Analysis of Systems: Held as Part of the Joint European Conferences on Theory and Practice of Software, ETAPS 2009,
Automatic verification of a turbogas control system with the murϕ verifier
HSCC'03 Proceedings of the 6th international conference on Hybrid systems: computation and control
Deep random search for efficient model checking of timed automata
Proceedings of the 13th Monterey conference on Composition of embedded systems: scientific and industrial issues
Bounded rational search for on-the-fly model checking of LTL properties
FSEN'09 Proceedings of the Third IPM international conference on Fundamentals of Software Engineering
TACAS'05 Proceedings of the 11th international conference on Tools and Algorithms for the Construction and Analysis of Systems
System level formal verification via model checking driven simulation
CAV'13 Proceedings of the 25th international conference on Computer Aided Verification
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The main obstruction to automatic verification ofconcurrent systems is the huge amount of memory required to complete the verification task (state explo-sion).In this paper we present a probabilistic algorithmfor automatic verification via model checking.Our algorithm trades space with time.In particular, when ourmemory is over because of state explosion our algorithmdoes not give up verification.Instead it just proceeds ata lower speed and its results will only hold with somearbitrarily small error probability.Our preliminary experimental results show that using our probabilistic algorithm we can typically savemore than 30% of RAM with an average time penaltyof about 100% w.r.t. a deterministic state space exploration with enough memory to complete the verification task. This is better than having to give up the verification task because of lack of memory.