Theoretical Computer Science
Characterization of the expressive power of silent transitions in timed automata
Fundamenta Informaticae
Bounded Model Checking for Timed Systems
FORTE '02 Proceedings of the 22nd IFIP WG 6.1 International Conference Houston on Formal Techniques for Networked and Distributed Systems
ICALP '92 Proceedings of the 19th International Colloquium on Automata, Languages and Programming
STACS '03 Proceedings of the 20th Annual Symposium on Theoretical Aspects of Computer Science
Pruning Techniques for the SAT-Based Bounded Model Checking Problem
CHARME '01 Proceedings of the 11th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
Verification of Timed Automata via Satisfiability Checking
FTRTFT '02 Proceedings of the 7th International Symposium on Formal Techniques in Real-Time and Fault-Tolerant Systems: Co-sponsored by IFIP WG 2.2
Revisiting Digitization, Robustness, and Decidability for Timed Automata
LICS '03 Proceedings of the 18th Annual IEEE Symposium on Logic in Computer Science
The complexity of theorem-proving procedures
STOC '71 Proceedings of the third annual ACM symposium on Theory of computing
On the Language Inclusion Problem for Timed Automata: Closing a Decidability Gap
LICS '04 Proceedings of the 19th Annual IEEE Symposium on Logic in Computer Science
SAT-based Reachability Checking for Timed Automata with Diagonal Constraints
Fundamenta Informaticae - Concurrency Specification and Programming (CS&P 2004)
HySAT: An efficient proof engine for bounded model checking of hybrid systems
Formal Methods in System Design
Universality Analysis for One-Clock Timed Automata
Fundamenta Informaticae - Fundamentals of Software Engineering 2007: Selected Contributions
Verifying Industrial Hybrid Systems with MathSAT
Electronic Notes in Theoretical Computer Science (ENTCS)
Diagonal constraints in timed automata: forward analysis of timed systems
FORMATS'05 Proceedings of the Third international conference on Formal Modeling and Analysis of Timed Systems
Incremental language inclusion checking for networks of timed automata
FORMATS'13 Proceedings of the 11th international conference on Formal Modeling and Analysis of Timed Systems
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Timed automata as acceptors of languages of finite timed words form a very useful framework for the verification of safety properties of real-time systems. Many of the classical automata-theoretic decision problems are undecidable for timed automata, for instance the inclusion or the universality problem. In this paper we consider restrictions of these problems: universality for deterministic timed automata and inclusion of a nondeterministic one by a deterministic one. We then advocate the use of SMT solvers for the exact incremental analysis of timed automata via these problems. We stratify these problems by considering domains of timed words of bounded length only and show that each bounded instance is in (co-) NP. We present some experimental data obtained from a prototypical implementation measuring the practical feasibility of the approach to timed automata via SMT solvers.