Theoretical Computer Science
Symbolic approximations for verifying real-time systems
Symbolic approximations for verifying real-time systems
Proceedings of the DIMACS/SYCON workshop on Hybrid systems III : verification and control: verification and control
An Efficient Algorithm for Minimizing Real-Time Transition Systems
Formal Methods in System Design - Special issue on computer aided verification (CAV 93)
Characterization of the expressive power of silent transitions in timed automata
Fundamenta Informaticae
Model checking
Timed automata with periodic clock constraints
Journal of Automata, Languages and Combinatorics
Analysis of Timed Systems Using Time-Abstracting Bisimulations
Formal Methods in System Design
The Expressive Power of Clocks
ICALP '95 Proceedings of the 22nd International Colloquium on Automata, Languages and Programming
The Regular Real-Time Languages
ICALP '98 Proceedings of the 25th International Colloquium on Automata, Languages and Programming
Model Checking of Real-Time Reachability Properties Using Abstractions
TACAS '98 Proceedings of the 4th International Conference on Tools and Algorithms for Construction and Analysis of Systems
CONCUR '98 Proceedings of the 9th International Conference on Concurrency Theory
Minimization of Timed Transition Systems
CONCUR '92 Proceedings of the Third International Conference on Concurrency Theory
Timing Assumptions and Verification of Finite-State Concurrent Systems
Proceedings of the International Workshop on Automatic Verification Methods for Finite State Systems
The Observational Power of Clocks
CONCUR '94 Proceedings of the Concurrency Theory
Specifying Timed State Sequences in Powerful Decidable Logics and Timed Automata
ProCoS Proceedings of the Third International Symposium Organized Jointly with the Working Group Provably Correct Systems on Formal Techniques in Real-Time and Fault-Tolerant Systems
Minimum-Cost Reachability for Priced Timed Automata
HSCC '01 Proceedings of the 4th International Workshop on Hybrid Systems: Computation and Control
Efficient Timed Reachability Analysis Using Clock Difference Diagrams
CAV '99 Proceedings of the 11th International Conference on Computer Aided Verification
CAV '00 Proceedings of the 12th International Conference on Computer Aided Verification
A Determinizable Class of Timed Automata
CAV '94 Proceedings of the 6th International Conference on Computer Aided Verification
Lectures on Embedded Systems, European Educational Forum, School on Embedded Systems
Verification of the Fast Reservation Protocol with Delayed Transmission using the Tool Kronos
RTAS '98 Proceedings of the Fourth IEEE Real-Time Technology and Applications Symposium
Formal modeling and analysis of an audio/video protocol: an industrial case study using UPPAAL
RTSS '97 Proceedings of the 18th IEEE Real-Time Systems Symposium
On-the-fly symbolic model checking for real-time systems
RTSS '97 Proceedings of the 18th IEEE Real-Time Systems Symposium
Forward Analysis of Updatable Timed Automata
Formal Methods in System Design
Theoretical Computer Science
Reachability solution characterization of parametric real-time systems
Theoretical Computer Science - Implementation and application of automata
A quadratic-time DBM-based successor algorithm for checking timed automata
Information Processing Letters
State space computation and analysis of Time Petri Nets
Theory and Practice of Logic Programming
SAT-based Reachability Checking for Timed Automata with Diagonal Constraints
Fundamenta Informaticae - Concurrency Specification and Programming (CS&P 2004)
Stochastic Games for Verification of Probabilistic Timed Automata
FORMATS '09 Proceedings of the 7th International Conference on Formal Modeling and Analysis of Timed Systems
Inference of Timed Transition Systems
Electronic Notes in Theoretical Computer Science (ENTCS)
Structural Translation from Time Petri Nets to Timed Automata
Electronic Notes in Theoretical Computer Science (ENTCS)
A quadratic-time DBM-based successor algorithm for checking timed automata
Information Processing Letters
Static guard analysis in timed automata verification
TACAS'03 Proceedings of the 9th international conference on Tools and algorithms for the construction and analysis of systems
Integration of time issues into component-based applications
CBSE'07 Proceedings of the 10th international conference on Component-based software engineering
VeSTA: a tool to verify the correct integration of a component in a composite timed system
ICFEM'07 Proceedings of the formal engineering methods 9th international conference on Formal methods and software engineering
Exact incremental analysis of timed automata with an SMT-solver
FORMATS'11 Proceedings of the 9th international conference on Formal modeling and analysis of timed systems
Beyond liveness: efficient parameter synthesis for time bounded liveness
FORMATS'05 Proceedings of the Third international conference on Formal Modeling and Analysis of Timed Systems
Diagonal constraints in timed automata: forward analysis of timed systems
FORMATS'05 Proceedings of the Third international conference on Formal Modeling and Analysis of Timed Systems
Verification, performance analysis and controller synthesis for real-time systems
FSEN'09 Proceedings of the Third IPM international conference on Fundamentals of Software Engineering
The power of hybrid acceleration
CAV'06 Proceedings of the 18th international conference on Computer Aided Verification
Timed-arc petri nets vs. networks of timed automata
ICATPN'05 Proceedings of the 26th international conference on Applications and Theory of Petri Nets
Efficient emptiness check for timed Büchi automata
Formal Methods in System Design
SAT-based Reachability Checking for Timed Automata with Diagonal Constraints
Fundamenta Informaticae - Concurrency Specification and Programming (CS&P 2004)
ACM Computing Surveys (CSUR)
Model checking for probabilistic timed automata
Formal Methods in System Design
| Hi-index | 0.01 |
Timed automata are a widely studied model for real-time systems. Since 8 years, several tools implement this model and are successfully used to verify real-life examples. In spite of this well-established framework, we prove that the forward analysis algorithm implemented in these tools is not correct! However, we also prove that it is correct for a restricted class of timed automata, which has been sufficient for modeling numerous real-life systems.