Model-checking in dense real-time
Information and Computation - Special issue: selections from 1990 IEEE symposium on logic in computer science
Theoretical Computer Science
The benefits of relaxing punctuality
Journal of the ACM (JACM)
OPEN/CÆSAR: An OPen Software Architecture for Verification, Simulation, and Testing
TACAS '98 Proceedings of the 4th International Conference on Tools and Algorithms for Construction and Analysis of Systems
Model Checking of Real-Time Reachability Properties Using Abstractions
TACAS '98 Proceedings of the 4th International Conference on Tools and Algorithms for Construction and Analysis of Systems
STACS '03 Proceedings of the 20th Annual Symposium on Theoretical Aspects of Computer Science
Verifying Abstractions of Timed Systems
CONCUR '96 Proceedings of the 7th International Conference on Concurrency Theory
Computing simulations on finite and infinite graphs
FOCS '95 Proceedings of the 36th Annual Symposium on Foundations of Computer Science
Reducing the number of clock variables of timed automata
RTSS '96 Proceedings of the 17th IEEE Real-Time Systems Symposium
Checking Timed Büchi Automata Emptiness Efficiently
Formal Methods in System Design
Experiments in the use of τ-simulations for the components-verification of real-time systems
Proceedings of the 2006 conference on Specification and verification of component-based systems
The temporal logic of programs
SFCS '77 Proceedings of the 18th Annual Symposium on Foundations of Computer Science
A model-extraction approach to verifying concurrent C programs with CADP
Science of Computer Programming
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VeSTA is a push-button tool for checking the correct integration of a component in an environment, for component-based timed systems. By correct integration, we mean that the local properties of the component are preserved when this component is merged into an environment. This correctness is checked by means of a so-called divergence-sensitive and stability-respecting timed τ-simulation, ensuring the preservation of all linear timed properties expressed in the logical formalism MITL (Metric Interval Temporal Logic), as well as strong nonzenoness and deadlock-freedom. The development of the tool was guided by the architecture of the OPEN-KRONOS tool. This allows, as additional feature, an easy connection of the models considered in VeSTA to the OPEN-CAESAR verification platform, and to the OPEN-KRONOS tool.