Model and Algorithm for Efficient Verification of High-Assurance Properties of Real-Time Systems
IEEE Transactions on Knowledge and Data Engineering
Efficient Verification of Timed Automata Using Dense and Discrete Time Semantics
CHARME '99 Proceedings of the 10th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
Assume-Guarantee Reasoning for Hierarchical Hybrid Systems
HSCC '01 Proceedings of the 4th International Workshop on Hybrid Systems: Computation and Control
A Practical Hierarchical Design by Timed Simulation Relations for Real-Time Systems
FM-Trends 98 Proceedings of the International Workshop on Current Trends in Applied Formal Method: Applied Formal Methods
CAV '99 Proceedings of the 11th International Conference on Computer Aided Verification
Automatic Abstraction for Verification of Timed Circuits and Systems
CAV '01 Proceedings of the 13th International Conference on Computer Aided Verification
LICS '96 Proceedings of the 11th Annual IEEE Symposium on Logic in Computer Science
Experiments in the use of τ-simulations for the components-verification of real-time systems
Proceedings of the 2006 conference on Specification and verification of component-based systems
Symbolic Branching Bisimulation-Checking of Dense-Time Systems in an Environment
HSCC '09 Proceedings of the 12th International Conference on Hybrid Systems: Computation and Control
CONCUR 2009 Proceedings of the 20th International Conference on Concurrency Theory
EMSOFT '09 Proceedings of the seventh ACM international conference on Embedded software
Verifying Stateful Timed CSP Using Implicit Clocks and Zone Abstraction
ICFEM '09 Proceedings of the 11th International Conference on Formal Engineering Methods: Formal Methods and Software Engineering
VeSTA: a tool to verify the correct integration of a component in a composite timed system
ICFEM'07 Proceedings of the formal engineering methods 9th international conference on Formal methods and software engineering
Undecidability of universality for timed automata with minimal resources
FORMATS'07 Proceedings of the 5th international conference on Formal modeling and analysis of timed systems
Symbolic simulation-checking of dense-time automata
FORMATS'07 Proceedings of the 5th international conference on Formal modeling and analysis of timed systems
Towards a theory of time-bounded verification
ICALP'10 Proceedings of the 37th international colloquium conference on Automata, languages and programming: Part II
Simulation and bisimulation for probabilistic timed automata
FORMATS'10 Proceedings of the 8th international conference on Formal modeling and analysis of timed systems
Hardness of preorder checking for basic formalisms
LPAR'10 Proceedings of the 16th international conference on Logic for programming, artificial intelligence, and reasoning
Hardness of preorder checking for basic formalisms
Theoretical Computer Science
Timed weak simulation verification and its application to stepwise refinement of real-time software
EUC'05 Proceedings of the 2005 international conference on Embedded and Ubiquitous Computing
Incremental verification of component-based timed systems
International Journal of Computer Applications in Technology
Better Abstractions for Timed Automata
LICS '12 Proceedings of the 2012 27th Annual IEEE/ACM Symposium on Logic in Computer Science
Modeling and verifying hierarchical real-time systems using stateful timed CSP
ACM Transactions on Software Engineering and Methodology (TOSEM)
ACM Computing Surveys (CSUR)
Compositional verification and optimization of interactive markov chains
CONCUR'13 Proceedings of the 24th international conference on Concurrency Theory
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