Characterizing finite Kripke structures in propositional temporal logic
Theoretical Computer Science - International Joint Conference on Theory and Practice of Software Development, P
Communicating Real-Time State Machines
IEEE Transactions on Software Engineering - Special issue: specification and analysis of real-time systems
Bisimulation Minimization in an Automata-Theoretic Verification Framework
FMCAD '98 Proceedings of the Second International Conference on Formal Methods in Computer-Aided Design
Verifying Abstractions of Timed Systems
CONCUR '96 Proceedings of the 7th International Conference on Concurrency Theory
Decidability of Bisimulation Equivalences for Parallel Timer Processes
CAV '92 Proceedings of the Fourth International Workshop on Computer Aided Verification
Efficient verification of timed automata with BDD-like data structures
International Journal on Software Tools for Technology Transfer (STTT)
Symbolic Parametric Safety Analysis of Linear Hybrid Systems with BDD-Like Data-Structures
IEEE Transactions on Software Engineering
Efficient on-the-fly algorithms for the analysis of timed games
CONCUR 2005 - Concurrency Theory
Symbolic simulation-checking of dense-time automata
FORMATS'07 Proceedings of the 5th international conference on Formal modeling and analysis of timed systems
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We present timed branching bisimulation in an environment which allows us to design a new bisimulation-checking algorithm with enhanced performance by reducing state spaces with shared environment state information between the model and the specification automatas. We also propose non-Zeno bisimulation in an environment that fully characterizes TCTL formulas. We then report our implementation and experiments with the ideas.