Computer-aided verification of coordinating processes: the automata-theoretic approach
Computer-aided verification of coordinating processes: the automata-theoretic approach
Model checking, abstraction, and compositional verification
Model checking, abstraction, and compositional verification
Binary decision diagrams and applications for VLSI CAD
Binary decision diagrams and applications for VLSI CAD
Better verification through symmetry
Formal Methods in System Design - Special issue on symmetry in automatic verification
Exploiting symmetry in temporal logic model checking
Formal Methods in System Design - Special issue on symmetry in automatic verification
Abstract interpretation of reactive systems
ACM Transactions on Programming Languages and Systems (TOPLAS)
A Calculus of Communicating Systems
A Calculus of Communicating Systems
Minimizing Interacting Finite State Machines: A Compositional Approach to Language to Containment
ICCS '94 Proceedings of the1994 IEEE International Conference on Computer Design: VLSI in Computer & Processors
Bisimulation Minimization in an Automata-Theoretic Verification Framework
FMCAD '98 Proceedings of the Second International Conference on Formal Methods in Computer-Aided Design
An Efficient Algorithm for Branching Bisimulation and Stuttering Equivalence
ICALP '90 Proceedings of the 17th International Colloquium on Automata, Languages and Programming
CONCUR '97 Proceedings of the 8th International Conference on Concurrency Theory
On the Complexity of Branching Modular Model Checking (Extended Abstract)
CONCUR '95 Proceedings of the 6th International Conference on Concurrency Theory
XEVE, an ESTEREL Verification Environment
CAV '98 Proceedings of the 10th International Conference on Computer Aided Verification
VIS: A System for Verification and Synthesis
CAV '96 Proceedings of the 8th International Conference on Computer Aided Verification
On-the-Fly Model Checking Under Fairness That Exploits Symmetry
CAV '97 Proceedings of the 9th International Conference on Computer Aided Verification
Bisimulation Minimization and Symbolic Model Checking
Formal Methods in System Design
ACM Transactions on Computational Logic (TOCL)
Bisimulation Minimization in an Automata-Theoretic Verification Framework
FMCAD '98 Proceedings of the Second International Conference on Formal Methods in Computer-Aided Design
Model Reductions and a Case Study
FMCAD '00 Proceedings of the Third International Conference on Formal Methods in Computer-Aided Design
Branching vs. Linear Time: Final Showdown
TACAS 2001 Proceedings of the 7th International Conference on Tools and Algorithms for the Construction and Analysis of Systems
Bisimulation and Model Checking
CHARME '99 Proceedings of the 10th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
Compositional Modeling and Minimization of Time-Inhomogeneous Markov Chains
HSCC '08 Proceedings of the 11th international workshop on Hybrid Systems: Computation and Control
Program Repair Suggestions from Graphical State-Transition Specifications
FORTE '08 Proceedings of the 28th IFIP WG 6.1 international conference on Formal Techniques for Networked and Distributed Systems
Symbolic Branching Bisimulation-Checking of Dense-Time Systems in an Environment
HSCC '09 Proceedings of the 12th International Conference on Hybrid Systems: Computation and Control
Bisimulation minimisation mostly speeds up probabilistic model checking
TACAS'07 Proceedings of the 13th international conference on Tools and algorithms for the construction and analysis of systems
Querying contract databases based on temporal behavior
Proceedings of the 2011 ACM SIGMOD International Conference on Management of data
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Bisimulation is a seemingly attractive state-space minimization technique because it can be computed automatically and yields the smallest model preserving all 碌-calculus formulas. It is considered impractical for symbolic model checking, however, because the required BDDs are prohibitively large for most designs. We revisit bisimulation minimization, this time in an automata-theoretic framework. Bisimulation has potential in this framework because after intersecting the design with the negation of the property, minimization can ignore most of the atomic propositions. We compute bisimulation using an algorithm due to Lee and Yannakakis that represents bisimulation relations by their equivalence classes and only explores reachable classes. This greatly improves on the time and memory usage of na茂ve algorithms.We demonstrate that bisimulation is practical for many designs within the automata-theoretic framework. In most cases, however, the cost of performing this reduction still outweighs that of conventional model checking.