Communicating sequential processes
Communicating sequential processes
Theoretical Computer Science
Deciding true concurrency equivalences on safe, finite nets
ICALP Selected papers of the twentieth international colloquium on Automata, languages and programming
Complexity of equivalence problems for concurrent systems of finite agents
Information and Computation
Journal of the ACM (JACM)
Communication and Concurrency
Introduction To Automata Theory, Languages, And Computation
Introduction To Automata Theory, Languages, And Computation
On the Complexity of Relational Problems for Finite State Processes (Extended Abstract)
ICALP '96 Proceedings of the 23rd International Colloquium on Automata, Languages and Programming
On the Complexity of Verifying Concurrent Transition Systems
CONCUR '97 Proceedings of the 8th International Conference on Concurrency Theory
Alphabet-Based Synchronisation is Exponentially Cheaper
CONCUR '02 Proceedings of the 13th International Conference on Concurrency Theory
The Linear Time-Branching Time Spectrum (Extended Abstract)
CONCUR '90 Proceedings of the Theories of Concurrency: Unification and Extension
Verification of Parallel Systems via Decomposition
CONCUR '92 Proceedings of the Third International Conference on Concurrency Theory
Verifying Abstractions of Timed Systems
CONCUR '96 Proceedings of the 7th International Conference on Concurrency Theory
The State Explosion Problem from Trace to Bisimulation Equivalence
FOSSACS '00 Proceedings of the Third International Conference on Foundations of Software Science and Computation Structures: Held as Part of the Joint European Conferences on Theory and Practice of Software,ETAPS 2000
Decidability of Bisimulation Equivalences for Parallel Timer Processes
CAV '92 Proceedings of the Fourth International Workshop on Computer Aided Verification
Computing simulations on finite and infinite graphs
FOCS '95 Proceedings of the 36th Annual Symposium on Foundations of Computer Science
Equivalence-checking on infinite-state systems: Techniques and results
Theory and Practice of Logic Programming
Hardness of equivalence checking for composed finite-state systems
Acta Informatica
A lower bound on web services composition
FOSSACS'07 Proceedings of the 10th international conference on Foundations of software science and computational structures
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We investigate the complexity of preorder checking when the specification is a flat finite-state system whereas the implementation is either a non-flat finite-state system or a standard timed automaton. In both cases, we show that simulation checking is Exptime-hard, and for the case of a non-flat implementation, the result holds even if there is no synchronization between the parallel components and their alphabets of actions are pairwise disjoint. Moreover, we show that the considered problems become Pspace-complete when the specification is assumed to be deterministic. Additionally, we establish that comparing a synchronous non-flat system with no hiding and a flat system is Pspace-hard for any relation between trace containment and bisimulation equivalence, even if the flat system is assumed to be fixed.