Three partition refinement algorithms
SIAM Journal on Computing
A timed model for communicating sequential processes
Theoretical Computer Science - Thirteenth International Colloquim on Automata, Languages and Programming, Renne
Computer networks
Timing assumptions and verification of finite-state concurrent systems
Proceedings of the international workshop on Automatic verification methods for finite state systems
Automata for modeling real-time systems
Proceedings of the seventeenth international colloquium on Automata, languages and programming
Design and validation of computer protocols
Design and validation of computer protocols
Real-time behaviour of asynchronous agents
CONCUR '90 Proceedings on Theories of concurrency : unification and extension: unification and extension
Online minimization of transition systems (extended abstract)
STOC '92 Proceedings of the twenty-fourth annual ACM symposium on Theory of computing
A toolbox for the verification of LOTOS programs
ICSE '92 Proceedings of the 14th international conference on Software engineering
Techniques for automatic verification of real-time systems
Techniques for automatic verification of real-time systems
Minimal state graph generation
Science of Computer Programming
Memory-efficient algorithms for the verification of temporal properties
Formal Methods in System Design - Special issue on computer-aided verification: general methods
Model-checking in dense real-time
Information and Computation - Special issue: selections from 1990 IEEE symposium on logic in computer science
Symbolic model checking for real-time systems
Information and Computation
A Calculus of Communicating Systems
A Calculus of Communicating Systems
Model Checking of Real-Time Reachability Properties Using Abstractions
TACAS '98 Proceedings of the 4th International Conference on Tools and Algorithms for Construction and Analysis of Systems
Compositional Specification of Timed Systems (Extended Abstract)
STACS '96 Proceedings of the 13th Annual Symposium on Theoretical Aspects of Computer Science
Minimization of Timed Transition Systems
CONCUR '92 Proceedings of the Third International Conference on Concurrency Theory
Partition Refinement in Real-Time Model Checking
FTRTFT '98 Proceedings of the 5th International Symposium on Formal Techniques in Real-Time and Fault-Tolerant Systems
Relating Time Progress and Deadlines in Hybrid Systems
HART '97 Proceedings of the International Workshop on Hybrid and Real-Time Systems
You Assume, We Guarantee: Methodology and Case Studies
CAV '98 Proceedings of the 10th International Conference on Computer Aided Verification
Kronos: A Model-Checking Tool for Real-Time Systems
CAV '98 Proceedings of the 10th International Conference on Computer Aided Verification
"On the Fly" Verification of Behavioural Equivalences and Preorders
CAV '91 Proceedings of the 3rd International Workshop on Computer Aided Verification
Decidability of Bisimulation Equivalences for Parallel Timer Processes
CAV '92 Proceedings of the Fourth International Workshop on Computer Aided Verification
An Efficient Algorithm for Minimizing Real-time Transition Systems
CAV '93 Proceedings of the 5th International Conference on Computer Aided Verification
Analysis of Timed Systems Based on Time-Abstracting Bisimulation
CAV '96 Proceedings of the 8th International Conference on Computer Aided Verification
A Platform for Combining Deductive with Algorithmic Verification
CAV '96 Proceedings of the 8th International Conference on Computer Aided Verification
Design and Synthesis of Synchronization Skeletons Using Branching-Time Temporal Logic
Logic of Programs, Workshop
An Old-Fashioned Recipe for Real Time
Proceedings of the Real-Time: Theory in Practice, REX Workshop
Time Abstracted Bisimiulation: Implicit Specifications and Decidability
Proceedings of the 9th International Conference on Mathematical Foundations of Programming Semantics
Efficient verification of real-time systems: compact data structure and state-space reduction
RTSS '97 Proceedings of the 18th IEEE Real-Time Systems Symposium
On-the-fly symbolic model checking for real-time systems
RTSS '97 Proceedings of the 18th IEEE Real-Time Systems Symposium
Verification of timed automata based on similarity
Fundamenta Informaticae
STACS '03 Proceedings of the 20th Annual Symposium on Theoretical Aspects of Computer Science
Fault Diagnosis for Timed Automata
FTRTFT '02 Proceedings of the 7th International Symposium on Formal Techniques in Real-Time and Fault-Tolerant Systems: Co-sponsored by IFIP WG 2.2
Towards Bounded Model Checking for the Universal Fragment of TCTL
FTRTFT '02 Proceedings of the 7th International Symposium on Formal Techniques in Real-Time and Fault-Tolerant Systems: Co-sponsored by IFIP WG 2.2
Duration Properties over Real Time System Designs
IWSSD '00 Proceedings of the 10th International Workshop on Software Specification and Design
Reachability analysis for timed automata using partitioning algorithms
Fundamenta Informaticae - Concurrency specification and programming
Checking reachability properties for timed automata via SAT
Fundamenta Informaticae - Concurrency specification and programming
Forward Analysis of Updatable Timed Automata
Formal Methods in System Design
Bounded model checking for knowledge and real time
Proceedings of the fourth international joint conference on Autonomous agents and multiagent systems
Checking Timed Büchi Automata Emptiness Efficiently
Formal Methods in System Design
The coarsest congruence for timed automata with deadlines contained in bisimulation
CONCUR 2005 - Concurrency Theory
On model-checking timed automata with stopwatch observers
Information and Computation
Folk theorems on the determinization and minimization of timed automata
Information Processing Letters
Minimization Algorithms for Time Petri Nets
Fundamenta Informaticae - Concurrency Specification and Programming (CS&P 2003)
Improvements in SAT-based Reachability Analysis for Timed Automata
Fundamenta Informaticae - Concurrency Specification and Programming (CS&P 2003)
ACTLS properties and Bounded Model Checking
Fundamenta Informaticae
Slicing of Timed Automata with Discrete Data
Fundamenta Informaticae - SPECIAL ISSUE ON CONCURRENCY SPECIFICATION AND PROGRAMMING (CS&P 2005) Ruciane-Nide, Poland, 28-30 September 2005
Bounded model checking for knowledge and real time
Artificial Intelligence
Bounded Model Checking for the Existential Fragment of TCTL_{-G} and Diagonal Timed Automata
Fundamenta Informaticae
Model Checking and Artificial Intelligence
Fundamenta Informaticae - Application of Concurrency to System Design, the Sixth Special Issue
Checking timed Büchi automata emptiness on simulation graphs
ACM Transactions on Computational Logic (TOCL)
Validation of contracts using enabledness preserving finite state abstractions
ICSE '09 Proceedings of the 31st International Conference on Software Engineering
A Compositional Translation of Timed Automata with Deadlines to Uppaal Timed Automata
FORMATS '09 Proceedings of the 7th International Conference on Formal Modeling and Analysis of Timed Systems
EMSOFT '09 Proceedings of the seventh ACM international conference on Embedded software
Analysis of Real-Time Systems with CTL Model Checkers
Electronic Notes in Theoretical Computer Science (ENTCS)
On model-checking timed automata with stopwatch observers
Information and Computation
Model checking liveness properties of genetic regulatory networks
TACAS'07 Proceedings of the 13th international conference on Tools and algorithms for the construction and analysis of systems
On synthesizing controllers from bounded-response properties
CAV'07 Proceedings of the 19th international conference on Computer aided verification
Reusing dynamic communication protocols in self-adaptive embedded component architectures
Proceedings of the 14th international ACM Sigsoft symposium on Component based software engineering
Runtime Verification for LTL and TLTL
ACM Transactions on Software Engineering and Methodology (TOSEM)
Monitoring of real-time properties
FSTTCS'06 Proceedings of the 26th international conference on Foundations of Software Technology and Theoretical Computer Science
Diagonal constraints in timed automata: forward analysis of timed systems
FORMATS'05 Proceedings of the Third international conference on Formal Modeling and Analysis of Timed Systems
Implementation of timed automata: an issue of semantics or modeling?
FORMATS'05 Proceedings of the Third international conference on Formal Modeling and Analysis of Timed Systems
Verifying linear duration constraints of timed automata
ICTAC'04 Proceedings of the First international conference on Theoretical Aspects of Computing
Multi-valued model checking in dense-time
ECSQARU'05 Proceedings of the 8th European conference on Symbolic and Quantitative Approaches to Reasoning with Uncertainty
Incremental verification of component-based timed systems
International Journal of Computer Applications in Technology
A logic for knowledge, correctness, and real time
CLIMA'04 Proceedings of the 5th international conference on Computational Logic in Multi-Agent Systems
State identification problems for timed automata
TestCom'05 Proceedings of the 17th IFIP TC6/WG 6.1 international conference on Testing of Communicating Systems
Forgetting the time in timed process algebra: timeless behaviour in a timestamped world
FMOODS'10/FORTE'10 Proceedings of the 12th IFIP WG 6.1 international conference and 30th IFIP WG 6.1 international conference on Formal Techniques for Distributed Systems
Component behavior synthesis for critical systems
ISARCS'10 Proceedings of the First international conference on Architecting Critical Systems
Model checking of time Petri nets
VECoS'07 Proceedings of the First international conference on Verification and Evaluation of Computer and Communication Systems
Bounded model checking for parametric timed automata
Transactions on Petri Nets and Other Models of Concurrency V
Better Abstractions for Timed Automata
LICS '12 Proceedings of the 2012 27th Annual IEEE/ACM Symposium on Logic in Computer Science
On decidability of prebisimulation for timed automata
CAV'12 Proceedings of the 24th international conference on Computer Aided Verification
Towards Building the State Class Graph of the TSPN Model
Fundamenta Informaticae
Fundamenta Informaticae - Application of Concurrency to System Design, the Sixth Special Issue
Bounded Model Checking for the Existential Fragment of TCTL$_{-G}$ and Diagonal Timed Automata
Fundamenta Informaticae
Real-Time coordination patterns for advanced mechatronic systems
COORDINATION'12 Proceedings of the 14th international conference on Coordination Models and Languages
Slicing of Timed Automata with Discrete Data
Fundamenta Informaticae - SPECIAL ISSUE ON CONCURRENCY SPECIFICATION AND PROGRAMMING (CS&P 2005) Ruciane-Nide, Poland, 28-30 September 2005
Minimization Algorithms for Time Petri Nets
Fundamenta Informaticae - Concurrency Specification and Programming (CS&P 2003)
Improvements in SAT-based Reachability Analysis for Timed Automata
Fundamenta Informaticae - Concurrency Specification and Programming (CS&P 2003)
Reachability Analysis for Timed Automata Using Partitioning Algorithms
Fundamenta Informaticae - Concurrency Specification and Programming (CS&P'2002), Part 2
Checking Reachability Properties for Timed Automata via SAT
Fundamenta Informaticae - Concurrency Specification and Programming (CS&P'2002), Part 2
ACTLS properties and Bounded Model Checking
Fundamenta Informaticae
Verification of Timed Automata Based on Similarity
Fundamenta Informaticae - Concurrency Specification and Programming Workshop (CS&P'2001)
ACM Computing Surveys (CSUR)
Shrinktech: a tool for the robustness analysis of timed automata
CAV'13 Proceedings of the 25th international conference on Computer Aided Verification
Information and Computation
FORMAL MODELLING OF REAL-TIME EMBEDDED AUTOMOTIVE ARCHITECTURE
Journal of Integrated Design & Process Science
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The objective of this paper is to show how verification of dense-time systems modeled as timed automata can be effectively performed using untimed verification techniques. In that way, the existing rich infrastructure in algorithms and tools for the verification of untimed systems can be exploited. The paper completes the ideas introduced in (Tripakis and Yovine, 1996, in Proc. 8th Conf. Computer-Aided Verification, CAV'96, Rutgers, NJ. LNCS, Vol. 1102, Springer-Verlag, 1996, pp. 232–243).Our approach consists in two steps. First, given a timed system A, we compute a finite graph G which captures the behavior of A modulo the fact that exact time delays are abstracted away. Then, we apply untimed verification techniques on G to prove properties on A. As property-specification languages, we use both the linear-time formalism of timed Büchi automata (TBA) and the branching-time logic TCTL. Model checking A against properties specified as TBA or TCTL formulae comes down to applying, respectively, automata-emptiness or CTL model-checking algorithms on G.The abstraction of exact delays is formalized under the concept of time-abstracting bisimulations. We define three time-abstracting bisimulations which are strictly ordered with respect to their reduction power. The stronger of them preserves both linear- and branching-time properties whereas the two weaker ones preserve only linear-time properties.The finite graph G is the quotient A with respect to a time-abstracting bisimulation. Generating G is called minimization and can be done by adapting a partition-refinement algorithm to the timed case. The adapted algorithm is symbolic, that is, equivalence classes are represented as simple polyhedra. When these polyhedra are not convex, operations become expensive, therefore, we develop a partition-refinement technique which preserves convexity.We have implemented the minimization algorithm in a prototype module called minim, as part of the real-time verification platform KRONOS (Bozga et al., 1998, in CAV'98). minim connects KRONOS to the CADP tool suite for the verification of untimed graphs (Fernandez et al., 1992, in 14th Int. Conf. on Software Engineering). To demonstrate the practical interest behind our approach, we present two case studies, namely, Fischer's mutual exclusion protocol and the CSMA/CD communication protocol.