Formal Methods in System Design - Special issue on symmetry in automatic verification
Partial order reduction: linear and branching temporal logics and process algebras
POMIV '96 Proceedings of the DIMACS workshop on Partial order methods in verification
Symbolic model checking using SAT procedures instead of BDDs
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Modalities for model checking (extended abstract): branching time strikes back
POPL '85 Proceedings of the 12th ACM SIGACT-SIGPLAN symposium on Principles of programming languages
Model checking
Improving partial order reductions for universal branching time properties
Fundamenta Informaticae - Special issue on Concurrency specification and programming (CS&P)
Analysis of Timed Systems Using Time-Abstracting Bisimulations
Formal Methods in System Design
Bounded Model Checking Using Satisfiability Solving
Formal Methods in System Design
Symbolic Model Checking
Bounded model checking for the universal fragment of CTL
Fundamenta Informaticae
Bounded Model Checking for Timed Systems
FORTE '02 Proceedings of the 22nd IFIP WG 6.1 International Conference Houston on Formal Techniques for Networked and Distributed Systems
Model Checking of Real-Time Reachability Properties Using Abstractions
TACAS '98 Proceedings of the 4th International Conference on Tools and Algorithms for Construction and Analysis of Systems
Partial Order Reductions for Timed Systems
CONCUR '98 Proceedings of the 9th International Conference on Concurrency Theory
Model Checking and Modular Verification
CONCUR '91 Proceedings of the 2nd International Conference on Concurrency Theory
Partial-Order Methods for Temporal Verification
CONCUR '93 Proceedings of the 4th International Conference on Concurrency Theory
Partial Orders and Verification of Real-Time systems
FTRTFT '96 Proceedings of the 4th International Symposium on Formal Techniques in Real-Time and Fault-Tolerant Systems
Verification of Timed Automata via Satisfiability Checking
FTRTFT '02 Proceedings of the 7th International Symposium on Formal Techniques in Real-Time and Fault-Tolerant Systems: Co-sponsored by IFIP WG 2.2
Towards Bounded Model Checking for the Universal Fragment of TCTL
FTRTFT '02 Proceedings of the 7th International Symposium on Formal Techniques in Real-Time and Fault-Tolerant Systems: Co-sponsored by IFIP WG 2.2
Lazy Theorem Proving for Bounded Model Checking over Infinite Domains
CADE-18 Proceedings of the 18th International Conference on Automated Deduction
Checking reachability properties for timed automata via SAT
Fundamenta Informaticae - Concurrency specification and programming
Bounded model checking for past LTL
TACAS'03 Proceedings of the 9th international conference on Tools and algorithms for the construction and analysis of systems
√erics: a tool for verifying timed automata and estelle specifications
TACAS'03 Proceedings of the 9th international conference on Tools and algorithms for the construction and analysis of systems
Bounded model checking for knowledge and real time
Artificial Intelligence
An Automata-Theoretic Dynamic Completeness Criterion for Bounded Model-Checking
VMCAI '09 Proceedings of the 10th International Conference on Verification, Model Checking, and Abstract Interpretation
Improving the Translation from ECTL to SAT
Fundamenta Informaticae - Concurrency Specification and Programming (CS&P)
Journal of Computer Science and Technology
Bounded Semantics of CTL and SAT-Based Verification
ICFEM '09 Proceedings of the 11th International Conference on Formal Engineering Methods: Formal Methods and Software Engineering
Improved bounded model checking for a fair branching-time temporal epistemic logic
Proceedings of the 9th International Conference on Autonomous Agents and Multiagent Systems: volume 1 - Volume 1
Bounded Parametric Verification for Distributed Time Petri Nets with Discrete-Time Semantics
Fundamenta Informaticae - Concurrency Specification and Programming (CS&P)
SAT-based (parametric) reachability for a class of distributed time Petri nets
Transactions on Petri nets and other models of concurrency IV
Improved bounded model checking for a fair branching-time temporal epistemic logic
MoChArt'10 Proceedings of the 6th international conference on Model checking and artificial intelligence
Verification of multi-agent systems via bounded model checking
AI'06 Proceedings of the 19th Australian joint conference on Artificial Intelligence: advances in Artificial Intelligence
Bounded model checking for the existential part of real-time CTL and knowledge
CEE-SET'09 Proceedings of the 4th IFIP TC 2 Central and East European conference on Advances in Software Engineering Techniques
Incremental, inductive CTL model checking
CAV'12 Proceedings of the 24th international conference on Computer Aided Verification
Hi-index | 0.00 |
The main contribution of the paper consists in showing that the bounded model checking (BMC) method is feasible for ACTLS* (the universal fragment of CTLS*) which subsumes both ACTL and LTL. The extension to ACTLS^* is obtained by redefining the function returning the sufficient number of executions over which an ACTLS* formula is checked, and then combining the two known translations to SAT for ACTL and LTL formulas. The proposed translation of ACTLS* formulas is essentially different from the existing translations of both ACTL and LTL formulas. Moreover, the formal treatment is the basis for the implementation of the technique in the symbolic model checker √erics.