Parametric Behaviour Analysis for Time Petri Nets
PaCT '999 Proceedings of the 5th International Conference on Parallel Computing Technologies
Proceedings of the 5th and 6th International SPIN Workshops on Theoretical and Practical Aspects of SPIN Model Checking
UPPAAL - Now, Next, and Future
MOVEP '00 Proceedings of the 4th Summer School on Modeling and Verification of Parallel Processes
Partial Order Reduction for Model Checking of Timed Automata
CONCUR '99 Proceedings of the 10th International Conference on Concurrency Theory
Verification of Timed Automata via Satisfiability Checking
FTRTFT '02 Proceedings of the 7th International Symposium on Formal Techniques in Real-Time and Fault-Tolerant Systems: Co-sponsored by IFIP WG 2.2
Partial Order Path Technique for Checking Parallel Timed Automata
FTRTFT '02 Proceedings of the 7th International Symposium on Formal Techniques in Real-Time and Fault-Tolerant Systems: Co-sponsored by IFIP WG 2.2
Towards Bounded Model Checking for the Universal Fragment of TCTL
FTRTFT '02 Proceedings of the 7th International Symposium on Formal Techniques in Real-Time and Fault-Tolerant Systems: Co-sponsored by IFIP WG 2.2
Product Interval Automata: A Subclass of Timed Automata
Proceedings of the 19th Conference on Foundations of Software Technology and Theoretical Computer Science
Abstractions and Partial Order Reductions for Checking Branching Properties of Time Petri Nets
ICATPN '01 Proceedings of the 22nd International Conference on Application and Theory of Petri Nets
A Partial Order Method for the Verification of Time Petri Nets
FCT '99 Proceedings of the 12th International Symposium on Fundamentals of Computation Theory
Modeling and verification of parallel processes
Enhancing Partial-Order Reduction via Process Clustering
Proceedings of the 16th IEEE international conference on Automated software engineering
Cluster-Based Partial-Order Reduction
Automated Software Engineering
A partial order semantics approach to the clock explosion problem of timed automata
Theoretical Computer Science - Tools and algorithms for the construction and analysis of systems (TACAS 2004)
ACTLS properties and Bounded Model Checking
Fundamenta Informaticae
Path Compression in Timed Automata
Fundamenta Informaticae - Special Issue on Concurrency Specification and Programming (CS&P)
Automatic generation of path conditions for concurrent timed systems
Theoretical Computer Science
Distributed Timed Automata with Independently Evolving Clocks
CONCUR '08 Proceedings of the 19th international conference on Concurrency Theory
Component-Based Design and Analysis of Embedded Systems with UPPAAL PORT
ATVA '08 Proceedings of the 6th International Symposium on Automated Technology for Verification and Analysis
Removing All Silent Transitions from Timed Automata
FORMATS '09 Proceedings of the 7th International Conference on Formal Modeling and Analysis of Timed Systems
Verification of timed and hybrid systems
ICATPN'00 Proceedings of the 21st international conference on Application and theory of petri nets
Partial order reduction for verification of real-time components
FORMATS'07 Proceedings of the 5th international conference on Formal modeling and analysis of timed systems
Journal of Computer Security - Digital Identity Management (DIM 2007)
Layered composition for timed automata
FORMATS'10 Proceedings of the 8th international conference on Formal modeling and analysis of timed systems
Efficient scenario verification for hybrid automata
CAV'11 Proceedings of the 23rd international conference on Computer aided verification
Distributed event clock automata
CIAA'11 Proceedings of the 16th international conference on Implementation and application of automata
Adding invariants to event zone automata
FORMATS'06 Proceedings of the 4th international conference on Formal Modeling and Analysis of Timed Systems
Communicating timed automata: the more synchronous, the more difficult to verify
CAV'06 Proceedings of the 18th international conference on Computer Aided Verification
Proving and explaining the unfeasibility of message sequence charts for hybrid systems
Proceedings of the International Conference on Formal Methods in Computer-Aided Design
Symbolic model checking of finite precision timed automata
ICTAC'05 Proceedings of the Second international conference on Theoretical Aspects of Computing
Model checking of hybrid systems using shallow synchronization
FMOODS'10/FORTE'10 Proceedings of the 12th IFIP WG 6.1 international conference and 30th IFIP WG 6.1 international conference on Formal Techniques for Distributed Systems
On interleaving in timed automata
CONCUR'06 Proceedings of the 17th international conference on Concurrency Theory
Timed unfoldings for networks of timed automata
ATVA'06 Proceedings of the 4th international conference on Automated Technology for Verification and Analysis
Symbolic unfoldings for networks of timed automata
ATVA'06 Proceedings of the 4th international conference on Automated Technology for Verification and Analysis
SAT based bounded model checking with partial order semantics for timed automata
TACAS'10 Proceedings of the 16th international conference on Tools and Algorithms for the Construction and Analysis of Systems
Path Compression in Timed Automata
Fundamenta Informaticae - Special Issue on Concurrency Specification and Programming (CS&P)
ACTLS properties and Bounded Model Checking
Fundamenta Informaticae
Avoiding shared clocks in networks of timed automata
CONCUR'12 Proceedings of the 23rd international conference on Concurrency Theory
SMT-based scenario verification for hybrid systems
Formal Methods in System Design
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