Automatic verification of finite-state concurrent systems using temporal logic specifications
ACM Transactions on Programming Languages and Systems (TOPLAS)
Characterizing finite Kripke structures in propositional temporal logic
Theoretical Computer Science - International Joint Conference on Theory and Practice of Software Development, P
Theoretical Computer Science
Model checking using net unfoldings
TAPSOFT '93 Selected papers of the colloquium on Formal approaches of software engineering
Partial-Order Methods for the Verification of Concurrent Systems: An Approach to the State-Explosion Problem
PEP - More than a Petri Net Tool
TACAs '96 Proceedings of the Second International Workshop on Tools and Algorithms for Construction and Analysis of Systems
Partial Order Reductions for Timed Systems
CONCUR '98 Proceedings of the 9th International Conference on Concurrency Theory
Partial Orders and Verification of Real-Time systems
FTRTFT '96 Proceedings of the 4th International Symposium on Formal Techniques in Real-Time and Fault-Tolerant Systems
Using Unfoldings to Avoid the State Explosion Problem in the Verification of Asynchronous Circuits
CAV '92 Proceedings of the Fourth International Workshop on Computer Aided Verification
Efficient Verification of Parallel Real-Time Systems
CAV '93 Proceedings of the 5th International Conference on Computer Aided Verification
Proceedings of the Real-Time: Theory in Practice, REX Workshop
CAV '93 Proceedings of the 5th International Conference on Computer Aided Verification
SAT-based (parametric) reachability for a class of distributed time Petri nets
Transactions on Petri nets and other models of concurrency IV
Parametric model checking with verICS
Transactions on Petri nets and other models of concurrency IV
Model checking of time Petri nets
VECoS'07 Proceedings of the First international conference on Verification and Evaluation of Computer and Communication Systems
Minimization Algorithms for Time Petri Nets
Fundamenta Informaticae - Concurrency Specification and Programming (CS&P 2003)
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The intention of the paper is to develop an efficient model checker for real time systems represented by safe time Petri nets and the real time branching time temporal logic TCTL. Our method is based on the idea of, (1), using the known region graph technique [1] to construct a finite representation of the state-space of a time Petri net and, (2), further reducing the size of this representation by exploiting the net concurrency. To show the correctness of the reduction we introduce a notion of a timed stuttering equivalence. Some experimental results which demonstrate the efficiency of the method are also given.