Design and validation of computer protocols
Design and validation of computer protocols
Stubborn sets for reduced state generation
APN 90 Proceedings on Advances in Petri nets 1990
The temporal logic of reactive and concurrent systems
The temporal logic of reactive and concurrent systems
A stubborn attack on state explosion
Formal Methods in System Design - Special issue on computer-aided verification: special methods I
IEEE Transactions on Software Engineering - Special issue on formal methods in software practice
Partial-Order Methods for the Verification of Concurrent Systems: An Approach to the State-Explosion Problem
Parallel Computer Architecture: A Hardware/Software Approach
Parallel Computer Architecture: A Hardware/Software Approach
An Efficient Partial Order Reduction Algorithm with an Alternative Proviso Implementation
Formal Methods in System Design
Using Automatic Process Clustering for Design Recovery and Distributed Debugging
IEEE Transactions on Software Engineering
Coverage Preserving Reduction Strategies for Reachability Analysis
Proceedings of the IFIP TC6/WG6.1 Twelth International Symposium on Protocol Specification, Testing and Verification XII
An improvement in formal verification
Proceedings of the 7th IFIP WG6.1 International Conference on Formal Description Techniques VII
Integrating Real Time into Spin: A Prototype Implementation
FORTE XI / PSTV XVIII '98 Proceedings of the FIP TC6 WG6.1 Joint International Conference on Formal Description Techniques for Distributed Systems and Communication Protocols (FORTE XI) and Protocol Specification, Testing and Verification (PSTV XVIII)
Combining Partial Order and Symmetry Reductions
TACAS '97 Proceedings of the Third International Workshop on Tools and Algorithms for Construction and Analysis of Systems
Partial Order Reductions for Timed Systems
CONCUR '98 Proceedings of the 9th International Conference on Concurrency Theory
Partial-Order Reduction in Symbolic State Space Exploration
CAV '97 Proceedings of the 9th International Conference on Computer Aided Verification
Combining Partial Order Reductions with On-the-fly Model-Checking
CAV '94 Proceedings of the 6th International Conference on Computer Aided Verification
Using Partial Orders for the Efficient Verification of Deadlock Freedom and Safety Properties
CAV '91 Proceedings of the 3rd International Workshop on Computer Aided Verification
Partial-Order Methods for Model Checking: From Linear Time to Branching Time
LICS '96 Proceedings of the 11th Annual IEEE Symposium on Logic in Computer Science
v-Promela: A Visual, Object-Oriented Language for SPIN
ISORC '99 Proceedings of the 2nd IEEE International Symposium on Object-Oriented Real-Time Distributed Computing
Enhancing Partial-Order Reduction via Process Clustering
Proceedings of the 16th IEEE international conference on Automated software engineering
Verification of concurrent systems: function and timing
Verification of concurrent systems: function and timing
Semantics driven dynamic partial-order reduction of MPI-based parallel programs
Proceedings of the 2007 ACM workshop on Parallel and distributed systems: testing and debugging
On commutativity based Edge Lean search
Annals of Mathematics and Artificial Intelligence
Stateful dynamic partial-order reduction
ICFEM'06 Proceedings of the 8th international conference on Formal Methods and Software Engineering
On commutativity based edge lean search
ICALP'07 Proceedings of the 34th international conference on Automata, Languages and Programming
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The verification of concurrent systems through an exhaustive traversal of the state space suffers from the infamous state-space-explosion problem, caused by the many interleavings of actions of different processes in the system. Partial-order reduction is a well-known technique to tackle this problem. In this paper, we present an enhancement of the partial-order-reduction scheme of Holzmann and Peled that uses the hierarchical structure of concurrent systems. Our technique tries to contain dependencies between actions within clusters of processes, capitalizing on the independence of actions in different clusters to reduce the state space to be verified while preserving properties of interest. The paper starts with a formalization of the partial-order-reduction technique and continues with a presentation of our enhanced technique, including a correctness argument. The new technique has been implemented in the verification tool SPIN. We present implementation details, some small experiments, and one larger case study using a cache coherency protocol. The experimental results are encouraging. Compared to standard partial-order reduction, improvements in reductions are obtained from 21% up to 98% in the number of states and 34% up to 99% in the number of state transitions.