Design and validation of computer protocols
Design and validation of computer protocols
Stubborn sets for reduced state generation
APN 90 Proceedings on Advances in Petri nets 1990
The temporal logic of reactive and concurrent systems
The temporal logic of reactive and concurrent systems
A stubborn attack on state explosion
Formal Methods in System Design - Special issue on computer-aided verification: special methods I
Partial-Order Methods for the Verification of Concurrent Systems: An Approach to the State-Explosion Problem
Using Automatic Process Clustering for Design Recovery and Distributed Debugging
IEEE Transactions on Software Engineering
Coverage Preserving Reduction Strategies for Reachability Analysis
Proceedings of the IFIP TC6/WG6.1 Twelth International Symposium on Protocol Specification, Testing and Verification XII
An improvement in formal verification
Proceedings of the 7th IFIP WG6.1 International Conference on Formal Description Techniques VII
Integrating Real Time into Spin: A Prototype Implementation
FORTE XI / PSTV XVIII '98 Proceedings of the FIP TC6 WG6.1 Joint International Conference on Formal Description Techniques for Distributed Systems and Communication Protocols (FORTE XI) and Protocol Specification, Testing and Verification (PSTV XVIII)
Combining Partial Order and Symmetry Reductions
TACAS '97 Proceedings of the Third International Workshop on Tools and Algorithms for Construction and Analysis of Systems
Partial Order Reductions for Timed Systems
CONCUR '98 Proceedings of the 9th International Conference on Concurrency Theory
``Next'' Heuristic for On-the-Fly Model Checking
CONCUR '99 Proceedings of the 10th International Conference on Concurrency Theory
Partial Order Reduction for Model Checking of Timed Automata
CONCUR '99 Proceedings of the 10th International Conference on Concurrency Theory
Partial-Order Reduction in Symbolic State Space Exploration
CAV '97 Proceedings of the 9th International Conference on Computer Aided Verification
Combining Partial Order Reductions with On-the-fly Model-Checking
CAV '94 Proceedings of the 6th International Conference on Computer Aided Verification
The Engineering of a Model Checker: The Gnu i-Protocol Case Study Revisited
Proceedings of the 5th and 6th International SPIN Workshops on Theoretical and Practical Aspects of SPIN Model Checking
Using Partial Orders for the Efficient Verification of Deadlock Freedom and Safety Properties
CAV '91 Proceedings of the 3rd International Workshop on Computer Aided Verification
Partial-Order Methods for Model Checking: From Linear Time to Branching Time
LICS '96 Proceedings of the 11th Annual IEEE Symposium on Logic in Computer Science
v-Promela: A Visual, Object-Oriented Language for SPIN
ISORC '99 Proceedings of the 2nd IEEE International Symposium on Object-Oriented Real-Time Distributed Computing
Verification of concurrent systems: function and timing
Verification of concurrent systems: function and timing
Cluster-Based Partial-Order Reduction
Automated Software Engineering
Some solutions to the ignoring problem
Proceedings of the 14th international SPIN conference on Model checking software
Verification of orchestration systems using compositional partial order reduction
ICFEM'11 Proceedings of the 13th international conference on Formal methods and software engineering
Stateful dynamic partial-order reduction
ICFEM'06 Proceedings of the 8th international conference on Formal Methods and Software Engineering
Hi-index | 0.00 |
Partial-order reduction is a well-known technique tocope with the state-space-explosion problem in the verificationof concurrent systems. Using the hierarchical structureof concurrent systems, we present an enhancement ofthe partial-order-reduction scheme of [12, 19]. A prototypeof the new algorithm has been implemented on top of theverification tool SPIN. The first experimental results are encouraging.