Three partition refinement algorithms
SIAM Journal on Computing
CCS expressions finite state processes, and three problems of equivalence
Information and Computation
The concurrency workbench: a semantics-based tool for the verification of concurrent systems
ACM Transactions on Programming Languages and Systems (TOPLAS)
A stubborn attack on state explosion
Formal Methods in System Design - Special issue on computer-aided verification: special methods I
IEEE Spectrum
IEEE Transactions on Software Engineering - Special issue on formal methods in software practice
Distributed Algorithms
Synchronous Programming of Reactive Systems
Synchronous Programming of Reactive Systems
A Calculus of Communicating Systems
A Calculus of Communicating Systems
Protocol Verification as a Hardware Design Aid
ICCD '92 Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors
Symbolic Exploration of transition Hierarchies
TACAS '98 Proceedings of the 4th International Conference on Tools and Algorithms for Construction and Analysis of Systems
Process Calculi, from Theory to Practice: Verification Tools
Proceedings of the International Workshop on Automatic Verification Methods for Finite State Systems
Specification and verification of concurrent systems in CESAR
Proceedings of the 5th Colloquium on International Symposium on Programming
MOCHA: Modularity in Model Checking
CAV '98 Proceedings of the 10th International Conference on Computer Aided Verification
CAV '90 Proceedings of the 2nd International Workshop on Computer Aided Verification
Using Partial Orders to Improve Automatic Verification Methods
CAV '90 Proceedings of the 2nd International Workshop on Computer Aided Verification
Exploiting Symmetry In Temporal Logic Model Checking
CAV '93 Proceedings of the 5th International Conference on Computer Aided Verification
Combining Partial Order Reductions with On-the-fly Model-Checking
CAV '94 Proceedings of the 6th International Conference on Computer Aided Verification
Verifying Systems with Replicated Components in Murphi
CAV '96 Proceedings of the 8th International Conference on Computer Aided Verification
CADP - A Protocol Validation and Verification Toolbox
CAV '96 Proceedings of the 8th International Conference on Computer Aided Verification
Design and Synthesis of Synchronization Skeletons Using Branching-Time Temporal Logic
Logic of Programs, Workshop
CAV '93 Proceedings of the 5th International Conference on Computer Aided Verification
LICS '96 Proceedings of the 11th Annual IEEE Symposium on Logic in Computer Science
Automated Refinement Checking for Asynchronous Processes
FMCAD '00 Proceedings of the Third International Conference on Formal Methods in Computer-Aided Design
Exploiting Hierarchical Structure for Efficient Formal Verification
CONCUR '00 Proceedings of the 11th International Conference on Concurrency Theory
Heuristics for Hierarchical Partitioning with Application to Model Checking
CHARME '01 Proceedings of the 11th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
Verifying Network Protocol Implementations by Symbolic Refinement Checking
CAV '01 Proceedings of the 13th International Conference on Computer Aided Verification
State Space Reduction by Proving Confluence
CAV '02 Proceedings of the 14th International Conference on Computer Aided Verification
Enhancing Partial-Order Reduction via Process Clustering
Proceedings of the 16th IEEE international conference on Automated software engineering
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We present a new heuristic for on-the-fly enumerative invariant verification. The heuristic is based on a construct for temporal scaling, called next, that compresses a sequence of transitions leading to a given target set into a single metatransition. First, we give an on-the-fly algorithm to search a process expression built using the constructs of hiding, parallel composition, and temporal scaling. Second, we show that as long the target set Θ of transitions includes all transitions that access variables shared with the environment, the process next Θ for P and P are equivalent according to the weak-simulation equivalence. As a result, to search the product of given processes, we can cluster processes into groups with as little communication among them as possible, and compose the groups only after applying appropriate hiding and temporal scaling operators. Applying this process recursively gives an expression that has multiple nested applications of next, and has potentially much fewer states than the original product. We report on an implementation, and show significant reductions for a tree-structured parity computer and a ring-structured leader-election protocol.