Theoretical Computer Science
Decomposition and Composition of Timed Automata
ICAL '99 Proceedings of the 26th International Colloquium on Automata, Languages and Programming
Partial Order Reductions for Timed Systems
CONCUR '98 Proceedings of the 9th International Conference on Concurrency Theory
Partial Order Reduction for Model Checking of Timed Automata
CONCUR '99 Proceedings of the 10th International Conference on Concurrency Theory
Layering of Real-Time Distributed Processes
ProCoS Proceedings of the Third International Symposium Organized Jointly with the Working Group Provably Correct Systems on Formal Techniques in Real-Time and Fault-Tolerant Systems
KRONOS: A Model-Checking Tool for Real-Time Systems (Tool-Presentation for FTRTFT '98)
FTRTFT '98 Proceedings of the 5th International Symposium on Formal Techniques in Real-Time and Fault-Tolerant Systems
Partial Order Path Technique for Checking Parallel Timed Automata
FTRTFT '02 Proceedings of the 7th International Symposium on Formal Techniques in Real-Time and Fault-Tolerant Systems: Co-sponsored by IFIP WG 2.2
Partial-Order Reduction in Symbolic State Space Exploration
CAV '97 Proceedings of the 9th International Conference on Computer Aided Verification
Using Partial Orders to Improve Automatic Verification Methods
CAV '90 Proceedings of the 2nd International Workshop on Computer Aided Verification
Layering and Action Refinement for Timed Systems
Proceedings of the Real-Time: Theory in Practice, REX Workshop
CSP-OZ-DC: a combination of specification techniques for processes, data and time
Nordic Journal of Computing
Formal modeling and analysis of an audio/video protocol: an industrial case study using UPPAAL
RTSS '97 Proceedings of the 18th IEEE Real-Time Systems Symposium
A partial order semantics approach to the clock explosion problem of timed automata
Theoretical Computer Science - Tools and algorithms for the construction and analysis of systems (TACAS 2004)
Principles of Model Checking (Representation and Mind Series)
Principles of Model Checking (Representation and Mind Series)
Real-Time Systems: Formal Specification and Automatic Verification
Real-Time Systems: Formal Specification and Automatic Verification
IEEE Transactions on Software Engineering
Partial order reduction for verification of real-time components
FORMATS'07 Proceedings of the 5th international conference on Formal modeling and analysis of timed systems
On interleaving in timed automata
CONCUR'06 Proceedings of the 17th international conference on Concurrency Theory
SAT based bounded model checking with partial order semantics for timed automata
TACAS'10 Proceedings of the 16th international conference on Tools and Algorithms for the Construction and Analysis of Systems
Automatic verification of real-time systems with rich data: an overview
TAMC'12 Proceedings of the 9th Annual international conference on Theory and Applications of Models of Computation
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We investigate layered composition for real-time systems modelled as (networks of) timed automata (TA). We first formulate the principles of layering and transition independence for TA, and demonstrate the validity of the communication closed layer (CCL) laws in such a setting, by means of an operator for layered composition that is intermediate between parallel and sequential composition. Next, we introduce the principles of input/output (i/o) and partial-order (po) equivalences, and show that such equivalences are preserved when the layered composition operator is replaced by sequential composition within the expressions appearing in the CCL laws. Finally, we proceed to show that such layering (together with equivalences obtained through the CCL laws) can be useful in the design and verification of dense real-time systems that consist of a network of interacting components, by bringing about a reduction of the state-space through the exploitation of transition independence. This is illustrated by considering a collision avoidance protocol developed for an audio/video system of Bang and Olufsen.