LSCs: Breathing Life into Message Sequence Charts
Formal Methods in System Design
Checking Safety Properties Using Induction and a SAT-Solver
FMCAD '00 Proceedings of the Third International Conference on Formal Methods in Computer-Aided Design
An Automata Based Interpretation of Live Sequence Charts
TACAS 2001 Proceedings of the 7th International Conference on Tools and Algorithms for the Construction and Analysis of Systems
Partial Order Reductions for Timed Systems
CONCUR '98 Proceedings of the 9th International Conference on Concurrency Theory
Model Checking of Message Sequence Charts
CONCUR '99 Proceedings of the 10th International Conference on Concurrency Theory
HYTECH: The Cornell HYbrid TECHnology Tool
Hybrid Systems II
Construction of Abstract State Graphs with PVS
CAV '97 Proceedings of the 9th International Conference on Computer Aided Verification
NuSMV 2: An OpenSource Tool for Symbolic Model Checking
CAV '02 Proceedings of the 14th International Conference on Computer Aided Verification
Timing Constraints in Message Sequence Chart Specifications
FORTE X / PSTV XVII '97 Proceedings of the IFIP TC6 WG6.1 Joint International Conference on Formal Description Techniques for Distributed Systems and Communication Protocols (FORTE X) and Protocol Specification, Testing and Verification (PSTV XVII)
LICS '96 Proceedings of the 11th Annual IEEE Symposium on Logic in Computer Science
Bounded LTL model checking with stable models
Theory and Practice of Logic Programming
Symbolic Parametric Safety Analysis of Linear Hybrid Systems with BDD-Like Data-Structures
IEEE Transactions on Software Engineering
HySAT: An efficient proof engine for bounded model checking of hybrid systems
Formal Methods in System Design
CAV '08 Proceedings of the 20th international conference on Computer Aided Verification
TASS: Timing Analyzer of Scenario-Based Specifications
CAV '09 Proceedings of the 21st International Conference on Computer Aided Verification
Abstract Model Checking without Computing the Abstraction
FM '09 Proceedings of the 2nd World Congress on Formal Methods
Verifying Industrial Hybrid Systems with MathSAT
Electronic Notes in Theoretical Computer Science (ENTCS)
Efficient Proof Engines for Bounded Model Checking of Hybrid Systems
Electronic Notes in Theoretical Computer Science (ENTCS)
On the notion of vacuous truth
LPAR'07 Proceedings of the 14th international conference on Logic for programming, artificial intelligence and reasoning
Automata and logics for timed message sequence charts
FSTTCS'07 Proceedings of the 27th international conference on Foundations of software technology and theoretical computer science
Scenario-based verification of real-time systems using Uppaal
Formal Methods in System Design
Efficient scenario verification for hybrid automata
CAV'11 Proceedings of the 23rd international conference on Computer aided verification
HyDI: A Language for Symbolic Hybrid Systems with Discrete Interaction
SEAA '11 Proceedings of the 2011 37th EUROMICRO Conference on Software Engineering and Advanced Applications
Optimizing bounded model checking for linear hybrid systems
VMCAI'05 Proceedings of the 6th international conference on Verification, Model Checking, and Abstract Interpretation
Model checking of hybrid systems using shallow synchronization
FMOODS'10/FORTE'10 Proceedings of the 12th IFIP WG 6.1 international conference and 30th IFIP WG 6.1 international conference on Formal Techniques for Distributed Systems
Towards a notion of unsatisfiable and unrealizable cores for LTL
Science of Computer Programming
Exploiting step semantics for efficient bounded model checking of asynchronous systems
Science of Computer Programming
Verification of Analog/Mixed-Signal Circuits Using Symbolic Methods
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Towards scenario-based testing of UML diagrams
TAP'12 Proceedings of the 6th international conference on Tests and Proofs
SMT-based scenario verification for hybrid systems
Formal Methods in System Design
Towards domain-specific property languages: the ProMoBox approach
Proceedings of the 2013 ACM workshop on Domain-specific modeling
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Networks of Hybrid Automata are a clean modelling framework for complex systems with discrete and continuous dynamics. Message Sequence Charts (MSCs) are a consolidated language to describe desired behaviors of a network of interacting components. Techniques to analyze the feasibility of an MSC over a given HA network are based on specialized bounded model checking techniques, and focus on efficiently constructing traces of the network that witness the MSC behavior. Unfortunately, these techniques are unable to deal with the "unfeasibility" of the MSC, i.e. that no trace of the network satisfies the MSC. In this paper, we tackle the problem of MSC unfeasibility: first, we propose specialized techniques to prove that an MSC can not be satisfied by any trace of a given HA network; second, we show how to explain why an MSC is unfeasible. The approach is cast in an SMT-based verification framework, using a local time semantics, where the timescales of the automata in the network are synchronized upon shared events. In order to prove unfeasibility, we generalize k-induction to deal with the structure of the MSC, so that the simple path condition is localized to each fragment of the MSC. The explanations are provided as formulas in the variables representing the time points of the events of the MSCs, and are generated using unsatisfiable core extraction and interpolation. An experimental evaluation demonstrates the effectiveness of the approach in proving unfeasibility, and the adequacy of the automatically generated explanations.