Formally verifying a microprocessor using a simulation methodology
DAC '94 Proceedings of the 31st annual Design Automation Conference
Efficient Detection of Vacuity in Temporal Model Checking
Formal Methods in System Design - Special issue on CAV '97
Model exploration with temporal logic query checking
Proceedings of the 10th ACM SIGSOFT symposium on Foundations of software engineering
Tree-Like Counterexamples in Model Checking
LICS '02 Proceedings of the 17th Annual IEEE Symposium on Logic in Computer Science
Vacuity Checking in the Modal Mu-Calculus
AMAST '02 Proceedings of the 9th International Conference on Algebraic Methodology and Software Technology
Decidability of Quantifed Propositional Branching Time Logics
AI '01 Proceedings of the 14th Australian Joint Conference on Artificial Intelligence: Advances in Artificial Intelligence
CAV '00 Proceedings of the 12th International Conference on Computer Aided Verification
CAV '02 Proceedings of the 14th International Conference on Computer Aided Verification
Efficient Detection of Vacuity in ACTL Formulas
CAV '97 Proceedings of the 9th International Conference on Computer Aided Verification
LICS '01 Proceedings of the 16th Annual IEEE Symposium on Logic in Computer Science
Deterministic CTL Query Solving
TIME '05 Proceedings of the 12th International Symposium on Temporal Representation and Reasoning
Exploiting Resolution Proofs to Speed Up LTL Vacuity Detection for BMC
FMCAD '07 Proceedings of the Formal Methods in Computer Aided Design
Easier and More Informative Vacuity Checks
MEMOCODE '07 Proceedings of the 5th IEEE/ACM International Conference on Formal Methods and Models for Codesign
Temporal Logic Query Checking: A Tool for Model Exploration
IEEE Transactions on Software Engineering
Making the Most of BMC Counterexamples
Electronic Notes in Theoretical Computer Science (ENTCS)
CHARME'05 Proceedings of the 13 IFIP WG 10.5 international conference on Correct Hardware Design and Verification Methods
Temporal antecedent failure: refining vacuity
CONCUR'07 Proceedings of the 18th international conference on Concurrency Theory
A Framework for Inherent Vacuity
HVC '08 Proceedings of the 4th International Haifa Verification Conference on Hardware and Software: Verification and Testing
On the distributivity of LTL specifications
ACM Transactions on Computational Logic (TOCL)
Strengthening properties using abstraction refinement
Proceedings of the Conference on Design, Automation and Test in Europe
Formal Methods in System Design
Towards a notion of unsatisfiable cores for LTL
FSEN'09 Proceedings of the Third IPM international conference on Fundamentals of Software Engineering
Proving and explaining the unfeasibility of message sequence charts for hybrid systems
Proceedings of the International Conference on Formal Methods in Computer-Aided Design
Towards a notion of unsatisfiable and unrealizable cores for LTL
Science of Computer Programming
SMT-based scenario verification for hybrid systems
Formal Methods in System Design
Proceedings of the 2013 9th Joint Meeting on Foundations of Software Engineering
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The model checking community has proposed numerous definitions of vacuous satisfaction, i.e., formal criteria which tell whether a temporal logic specification holds true on a system model for the intended reason. In this paper we attempt to study the notion of vacuous satisfaction from first principles. We show that despite the apparently vague formulation of the vacuity problem, most proposed notions of vacuity for temporal logic can be cast into a uniform and simple framework, and compare previous approaches to vacuity detection from this unified point of view.