Formal Methods in System Design
Beyond vacuity: towards the strongest passing formula
Proceedings of the 2008 International Conference on Formal Methods in Computer-Aided Design
Contradictory antecedent debugging in bounded model checking
Proceedings of the 19th ACM Great Lakes symposium on VLSI
A Framework for Inherent Vacuity
HVC '08 Proceedings of the 4th International Haifa Verification Conference on Hardware and Software: Verification and Testing
The role of mutation analysis for property qualification
MEMOCODE'09 Proceedings of the 7th IEEE/ACM international conference on Formal Methods and Models for Codesign
On the notion of vacuous truth
LPAR'07 Proceedings of the 14th international conference on Logic for programming, artificial intelligence and reasoning
Vacuity analysis for property qualification by mutation of checkers
Proceedings of the Conference on Design, Automation and Test in Europe
Property analysis and design understanding
Proceedings of the Conference on Design, Automation and Test in Europe
Strengthening properties using abstraction refinement
Proceedings of the Conference on Design, Automation and Test in Europe
Robust Vacuity for Branching Temporal Logic
ACM Transactions on Computational Logic (TOCL)
Towards a notion of unsatisfiable cores for LTL
FSEN'09 Proceedings of the Third IPM international conference on Fundamentals of Software Engineering
Towards a notion of unsatisfiable and unrealizable cores for LTL
Science of Computer Programming
Beyond vacuity: towards the strongest passing formula
Formal Methods in System Design
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In formal verification, we verify that a system is correct with respect to a specification. Cases like antecedent failure can make a successful pass of the verification procedure meaningless. Vacuity detection can signal such "meaningless" passes of the specification, and indeed vacuity checks are now a standard component in many commercial model checkers. We address two dimensions of vacuity: the computational effort and the information that is given to the user. As for the first dimension, we present several preliminary vacuity checks that can be done without the design itself, which implies that some information can be found with a significantly smaller effort. As for the second dimension, we present algorithms for deriving three types of information that are not provided by standard vacuity checks, assuming M 驴 for a model M and property 驴: a) behaviors that are possibly missing from M (or wrongly restricted by the environment) b) the largest subset of occurrences of literals in 驴 that can be replaced with false simultaneously without falsifying 驴 in M, and finally c) the degree of responsibility of each occurrence of a literal in 驴 to its satisfaction in the model M, which can be seen as a fine-grain form of vacuity. The complexity of each of these problems is proven. Overall this extra information can lead to tighter specifications and more guidance for finding errors.