Analysis of Timed Systems Using Time-Abstracting Bisimulations
Formal Methods in System Design
Efficient and User-Friendly Verification
IEEE Transactions on Computers
A New Numerical Abstract Domain Based on Difference-Bound Matrices
PADO '01 Proceedings of the Second Symposium on Programs as Data Objects
Verification of Plan Models Using UPPAAL
FAABS '00 Proceedings of the First International Workshop on Formal Approaches to Agent-Based Systems-Revised Papers
TACAS '99 Proceedings of the 5th International Conference on Tools and Algorithms for Construction and Analysis of Systems
UPPAAL - Now, Next, and Future
MOVEP '00 Proceedings of the 4th Summer School on Modeling and Verification of Parallel Processes
Automated Test Generation from Timed Automata
TACAS 2001 Proceedings of the 7th International Conference on Tools and Algorithms for the Construction and Analysis of Systems
Efficient Verification of Timed Automata with BDD-Like Data-Structures
VMCAI 2003 Proceedings of the 4th International Conference on Verification, Model Checking, and Abstract Interpretation
The Impressive Power of Stopwatches
CONCUR '00 Proceedings of the 11th International Conference on Concurrency Theory
Efficient Verification of Timed Automata Using Dense and Discrete Time Semantics
CHARME '99 Proceedings of the 10th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
FTRTFT '02 Proceedings of the 7th International Symposium on Formal Techniques in Real-Time and Fault-Tolerant Systems: Co-sponsored by IFIP WG 2.2
A Few Graph-Based Relational Numerical Abstract Domains
SAS '02 Proceedings of the 9th International Symposium on Static Analysis
As Cheap as Possible: Efficient Cost-Optimal Reachability for Priced Timed Automata
CAV '01 Proceedings of the 13th International Conference on Computer Aided Verification
Modeling and verification of parallel processes
Guided synthesis of control programs using UPPAAL
Nordic Journal of Computing
Nordic Journal of Computing
Formal Methods in System Design
Reachability analysis for timed automata using partitioning algorithms
Fundamenta Informaticae - Concurrency specification and programming
Checking reachability properties for timed automata via SAT
Fundamenta Informaticae - Concurrency specification and programming
Automatic verification of the TLS handshake protocol
Proceedings of the 2004 ACM symposium on Applied computing
A Test Case Generation Algorithm for Real-Time Systems
QSIC '04 Proceedings of the Quality Software, Fourth International Conference
Proceedings of the 2005 ACM symposium on Applied computing
On using priced timed automata to achieve optimal scheduling
Formal Methods in System Design
Automatic Debugging of Real-Time Systems Based on Incremental Satisfiability Counting
IEEE Transactions on Computers
Improvements in SAT-based Reachability Analysis for Timed Automata
Fundamenta Informaticae - Concurrency Specification and Programming (CS&P 2003)
Journal of Embedded Computing - Real-Time and Embedded Computing Systems
Monitoring of Timing Constraints with Confidence Threshold Requirements
IEEE Transactions on Computers
Path Compression in Timed Automata
Fundamenta Informaticae - Special Issue on Concurrency Specification and Programming (CS&P)
Relative simulation and model checking of real-time processes
ACSC '08 Proceedings of the thirty-first Australasian conference on Computer science - Volume 74
Real-Time Model Checking on Secondary Storage
Model Checking and Artificial Intelligence
Logahedra: A New Weakly Relational Domain
ATVA '09 Proceedings of the 7th International Symposium on Automated Technology for Verification and Analysis
Exact join detection for convex polyhedra and other numerical abstractions
Computational Geometry: Theory and Applications
Weakly-relational shapes for numeric abstractions: improved algorithms and proofs of correctness
Formal Methods in System Design
TCTL inevitability analysis of dense-time systems
CIAA'03 Proceedings of the 8th international conference on Implementation and application of automata
Using Petri net invariants in state space construction
TACAS'03 Proceedings of the 9th international conference on Tools and algorithms for the construction and analysis of systems
SDL as UML: why and what panel
UML'99 Proceedings of the 2nd international conference on The unified modeling language: beyond the standard
Generating Petri net state spaces
ICATPN'07 Proceedings of the 28th international conference on Applications and theory of Petri nets and other models of concurrency
Application of static analyses for state space reduction to microcontroller assembly code
FMICS'07 Proceedings of the 12th international conference on Formal methods for industrial critical systems
Symbolic and compositional reachability for timed automata
RP'10 Proceedings of the 4th international conference on Reachability problems
Developing UPPAAL over 15 years
Software—Practice & Experience
Fully symbolic model checking for timed automata
CAV'11 Proceedings of the 23rd international conference on Computer aided verification
Parallel recursive state compression for free
Proceedings of the 18th international SPIN conference on Model checking software
Model checking timed automata with priorities using DBM subtraction
FORMATS'06 Proceedings of the 4th international conference on Formal Modeling and Analysis of Timed Systems
Verification, performance analysis and controller synthesis for real-time systems
FSEN'09 Proceedings of the Third IPM international conference on Fundamentals of Software Engineering
Widening operators for weakly-relational numeric abstractions
SAS'05 Proceedings of the 12th international conference on Static Analysis
Symbolic unfoldings for networks of timed automata
ATVA'06 Proceedings of the 4th international conference on Automated Technology for Verification and Analysis
Path Compression in Timed Automata
Fundamenta Informaticae - Special Issue on Concurrency Specification and Programming (CS&P)
Improvements in SAT-based Reachability Analysis for Timed Automata
Fundamenta Informaticae - Concurrency Specification and Programming (CS&P 2003)
Reachability Analysis for Timed Automata Using Partitioning Algorithms
Fundamenta Informaticae - Concurrency Specification and Programming (CS&P'2002), Part 2
Checking Reachability Properties for Timed Automata via SAT
Fundamenta Informaticae - Concurrency Specification and Programming (CS&P'2002), Part 2
Access-Based Localization for Octagons
Electronic Notes in Theoretical Computer Science (ENTCS)
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During the past few years, a number of verification tools have been developed for real-time systems in the framework of timed automata (e.g. KRONOS and UPPAAL). One of the major problems in applying these tools to industrial-size systems is the huge memory-usage for the exploration of the state-space of a network (or product) of timed automata, as the model-checkers must keep information on not only the control structure of the automata but also the clock values specified by clock constraints. In this paper, we present a compact data structure for representing clock constraints. The data structure is based on an O(n/sup 3/) algorithm which, given a constraint system over real-valued variables consisting of bounds on differences, constructs an equivalent system with a minimal number of constraints. In addition, we have developed an on-the-fly, reduction technique to minimize the space-usage. Based on static analysis of the control structure of a network of timed automata, we are able to compute a set of symbolic states that cover all the dynamic loops of the network in an on-the-fly searching algorithm, and thus ensure termination in reachability analysis. The two techniques and their combination have been implemented in the tool UPPAAL. Our experimental results demonstrate that the techniques result in truly significant space-reductions: for six examples from the literature, the space saving is between 75% and 94%, and in (nearly) all examples time-performance is improved. Also noteworthy is the observation that the two techniques are completely orthogonal.