Modechart: A Specification Language for Real-Time Systems
IEEE Transactions on Software Engineering
An efficient search algorithm to find the elementary circuits of a graph
Communications of the ACM
A machine program for theorem-proving
Communications of the ACM
SATIRE: a new incremental satisfiability engine
Proceedings of the 38th annual Design Automation Conference
Simulation-Verification: Biting at the State Explosion Problem
IEEE Transactions on Software Engineering
Efficient algorithms for debugging timing constraint violations
Proceedings of the 8th ACM/IEEE international workshop on Timing issues in the specification and synthesis of digital systems
Optimization of Rule-Based Systems Using State Space Graphs
IEEE Transactions on Knowledge and Data Engineering
Symbolic Model Checking without BDDs
TACAS '99 Proceedings of the 5th International Conference on Tools and Algorithms for Construction and Analysis of Systems
CAV '97 Proceedings of the 9th International Conference on Computer Aided Verification
Timing Analysis of the X-38 Space Station Crew Return Vehicle Avionics
RTAS '99 Proceedings of the Fifth IEEE Real-Time Technology and Applications Symposium
The MSP.RTL real-time scheduler synthesis tool
RTSS '96 Proceedings of the 17th IEEE Real-Time Systems Symposium
Efficient verification of real-time systems: compact data structure and state-space reduction
RTSS '97 Proceedings of the 18th IEEE Real-Time Systems Symposium
Real-Time Systems: Scheduling, Analysis, and Verification
Real-Time Systems: Scheduling, Analysis, and Verification
Incremental Satisfiability Counting for Real-Time Systems
RTAS '04 Proceedings of the 10th IEEE Real-Time and Embedded Technology and Applications Symposium
Self-Stabilizing Real-Time OPS5 Production Systems
IEEE Transactions on Knowledge and Data Engineering
Systematic Debugging of Real-Time Systems based on Incremental Satisfiability Counting
RTAS '05 Proceedings of the 11th IEEE Real Time on Embedded Technology and Applications Symposium
An integrated infrastructure for monitoring and evaluating agent-based systems
Expert Systems with Applications: An International Journal
Volume Computation for Boolean Combination of Linear Arithmetic Constraints
CADE-22 Proceedings of the 22nd International Conference on Automated Deduction
On the Toyota's Throttle Control Problem
GREENCOM-CPSCOM '10 Proceedings of the 2010 IEEE/ACM Int'l Conference on Green Computing and Communications & Int'l Conference on Cyber, Physical and Social Computing
| Hi-index | 14.98 |
Real-time logic (RTL) [2], [3], [4] is useful for the verification of a safety assertion with respect to the specification of a real-time system. Since the satisfiability problem for RTL is undecidable, the systematic debugging of a real-time system appears impossible. A first step toward this challenge was presented in [1]. With RTL, each propositional formula corresponds to a verification condition. The number of truth assignments of a propositional formula can help us determine the specific constraints which should be added or modified to get the expected solutions. This paper solves an even more challenging problem specified as future work in [1], namely, the embedding and the integration of our debugger in autonomous systems which generate real-time control plans on-the-fly, since these specifications must meet timing constraints, but without human interaction. The idea is to consider in advance all the necessary information, such as the designer's guidance. We have implemented a tool (called ADRTL) that is able to perform automatic debugging. The confidence of our approach is high as we have successfully evaluated ADRTL on several existing industrial-based applications.