Safety analysis of timing properties in real-time systems
IEEE Transactions on Software Engineering - Special issue on reliability and safety in real-time process control
A computational logic handbook
A computational logic handbook
A timed model for communicating sequential processes
Theoretical Computer Science - Thirteenth International Colloquim on Automata, Languages and Programming, Renne
Temporal logic for real time systems
Temporal logic for real time systems
The concurrency workbench: a semantics-based tool for the verification of concurrent systems
ACM Transactions on Programming Languages and Systems (TOPLAS)
Experience with Formal Methods in Critical Systems
IEEE Software
Modechart: A Specification Language for Real-Time Systems
IEEE Transactions on Software Engineering
Generating test cases for real-time systems from logic specifications
ACM Transactions on Computer Systems (TOCS)
Requirements definition languages for real-time embedded systems
Requirements definition languages for real-time embedded systems
CCSR: A Calculus for Communicating Shared Resources
CONCUR '90 Proceedings of the Theories of Concurrency: Unification and Extension
Proceedings of the Real-Time: Theory in Practice, REX Workshop
A Graphical Language with Formal Semantics for the Specification and Analysis of Real-Time Systems
RTSS '95 Proceedings of the 16th IEEE Real-Time Systems Symposium
RTSS '95 Proceedings of the 16th IEEE Real-Time Systems Symposium
Formal methods for real-time systems
Formal methods for real-time systems
Using mappings to prove timing properties
Distributed Computing
A Flexible, Extensible Simulation Environment for Testing Real-Time Specifications
IEEE Transactions on Computers
Automatic Debugging of Real-Time Systems Based on Incremental Satisfiability Counting
IEEE Transactions on Computers
Emulating and diagnosing IR-drop by using dynamic SDF
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
Formal analysis of safety-critical system simulations
Proceedings of the 2nd International Conference on Application and Theory of Automation in Command and Control Systems
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Simulation and verification are the two conventional techniques for the analysis of specifications of real-time systems. While simulation is relatively inexpensive in terms of execution time, it only validates the behavior of a system for one particular computation path. On the other hand, verification provides guarantees over the entire set of computation paths of a system, but is, in general, very expensive due to the state-space explosion problem. In this paper, we introduce a new technique: Simulation-verification combines the best of both worlds by synthesizing an intermediate analysis method. This method uses simulation to limit the generation of a computation graph to that set of computations consistent with the simulation. This limited computation graph, called a simulation-verification graph, can be one or more orders of magnitude smaller than the full computation graph. A tool, XSVT, is described which implements simulation-verification graphs. Three paradigms for using the new technique are proposed. The paper illustrates the application of the proposed technique via an example of a robot controller for a manufacturing assembly line.