The MSP.RTL real-time scheduler synthesis tool

Authors:
A. K. Mok;Duu-Chung Tsou;R. C. M. de Rooij
Affiliations:
-;-;-
Venue:
RTSS '96 Proceedings of the 17th IEEE Real-Time Systems Symposium
Year:
1996

Citing 0
Cited 10

Efficient algorithms for debugging timing constraint violations

Proceedings of the 8th ACM/IEEE international workshop on Timing issues in the specification and synthesis of digital systems
Real-Time Supervisory Control of a Processor for Non-Preemptive Execution of Periodic Tasks

Real-Time Systems
A strongly polynomial-time algorithm for over-constraint resolution: efficient debugging of timing constraint violations

Proceedings of the tenth international symposium on Hardware/software codesign
Real Time Scheduling Theory: A Historical Perspective

Real-Time Systems
Automatic Debugging of Real-Time Systems Based on Incremental Satisfiability Counting

IEEE Transactions on Computers
Uniprocessor scheduling under precedence constraints for embedded systems design

ACM Transactions on Embedded Computing Systems (TECS)
Provably efficient algorithms for resolving temporal and spatial difference constraint violations

ACM Transactions on Design Automation of Electronic Systems (TODAES)
A model-based approach for multiple QoS in scheduling: from models to implementation

Automated Software Engineering
Handling conflicts of context-aware reminding system in sensorised home

Cluster Computing
Computing platforms

Embedded Systems Design

Quantified Score

Hi-index	0.00

Visualization

Abstract

MSP.RTL is a tool for producing real time schedulers for a wide variety of timing constraints. The input to MSP.RTL can be customized for different application domains, as long as their timing semantics can be expressed in RTL (real time logic). The scheduler synthesis algorithm treats the real time scheduling problem as a temporal constraint satisfaction problem with additional resource constraints. The current version of MSP.RTL computes cyclic schedules for multiprocessor systems in a three part process: the first part constructs a temporal constraint graph representing the input timing specification. The second part finds a set of solutions of the temporal constraint graph by using a combination of constraint satisfaction and an incremental positive cycle detection algorithm. The third part searches the set of solutions to find a feasible schedule which satisfies the resource constraints by exploiting search strategies and results from real time scheduling theory. We have used the MSP.RTL tool to solve same benchmark problems including a sanitized version of the Boeing 777 Integrated Airplane Information Management System (AIMS).