Model-checking in dense real-time
Information and Computation - Special issue: selections from 1990 IEEE symposium on logic in computer science
Theoretical Computer Science
An efficient state space generation for analysis of real-time systems
ISSTA '96 Proceedings of the 1996 ACM SIGSOFT international symposium on Software testing and analysis
A machine program for theorem-proving
Communications of the ACM
Analysis of Timed Systems Using Time-Abstracting Bisimulations
Formal Methods in System Design
Chaff: engineering an efficient SAT solver
Proceedings of the 38th annual Design Automation Conference
Bounded Model Checking for Timed Systems
FORTE '02 Proceedings of the 22nd IFIP WG 6.1 International Conference Houston on Formal Techniques for Networked and Distributed Systems
Checking Safety Properties Using Induction and a SAT-Solver
FMCAD '00 Proceedings of the Third International Conference on Formal Methods in Computer-Aided Design
Automata For Modeling Real-Time Systems
ICALP '90 Proceedings of the 17th International Colloquium on Automata, Languages and Programming
Model Checking of Real-Time Reachability Properties Using Abstractions
TACAS '98 Proceedings of the 4th International Conference on Tools and Algorithms for Construction and Analysis of Systems
Timed Diagnostics for Reachability Properties
TACAS '99 Proceedings of the 5th International Conference on Tools and Algorithms for Construction and Analysis of Systems
Symbolic Model Checking without BDDs
TACAS '99 Proceedings of the 5th International Conference on Tools and Algorithms for Construction and Analysis of Systems
Symbolic Reachability Analysis Based on SAT-Solvers
TACAS '00 Proceedings of the 6th International Conference on Tools and Algorithms for Construction and Analysis of Systems: Held as Part of the European Joint Conferences on the Theory and Practice of Software, ETAPS 2000
Bounded Reachability Checking with Process Semantics
CONCUR '01 Proceedings of the 12th International Conference on Concurrency Theory
Verification of Timed Automata via Satisfiability Checking
FTRTFT '02 Proceedings of the 7th International Symposium on Formal Techniques in Real-Time and Fault-Tolerant Systems: Co-sponsored by IFIP WG 2.2
Towards Bounded Model Checking for the Universal Fragment of TCTL
FTRTFT '02 Proceedings of the 7th International Symposium on Formal Techniques in Real-Time and Fault-Tolerant Systems: Co-sponsored by IFIP WG 2.2
Lectures on Embedded Systems, European Educational Forum, School on Embedded Systems
A SAT Based Approach for Solving Formulas over Boolean and Linear Mathematical Propositions
CADE-18 Proceedings of the 18th International Conference on Automated Deduction
Lazy Theorem Proving for Bounded Model Checking over Infinite Domains
CADE-18 Proceedings of the 18th International Conference on Automated Deduction
SATO: An Efficient Propositional Prover
CADE-14 Proceedings of the 14th International Conference on Automated Deduction
Automated Verification of Infinite State Concurrent Systems
PPAM '01 Proceedings of the th International Conference on Parallel Processing and Applied Mathematics-Revised Papers
Data-Structures for the Verification of Timed Automata
HART '97 Proceedings of the International Workshop on Hybrid and Real-Time Systems
Efficient verification of real-time systems: compact data structure and state-space reduction
RTSS '97 Proceedings of the 18th IEEE Real-Time Systems Symposium
On-the-fly symbolic model checking for real-time systems
RTSS '97 Proceedings of the 18th IEEE Real-Time Systems Symposium
Bounded Model Checking for the Universal Fragment of CTL
Fundamenta Informaticae - Concurrency Specification and Programming Workshop (CS&P'2001)
Translation of Intermediate Language to Timed Automata with Discrete Data
Fundamenta Informaticae - Concurrency Specification and Programming (CS&P)
Bounded Model Checking for the Existential Fragment of TCTL$_{-G}$ and Diagonal Timed Automata
Fundamenta Informaticae
SAT-Based Reachability Checking for Timed Automata with Discrete Data
Fundamenta Informaticae - Special Issue on Concurrency Specification and Programming (CS&P)
SAT-based Reachability Checking for Timed Automata with Diagonal Constraints
Fundamenta Informaticae - Concurrency Specification and Programming (CS&P 2004)
Minimization Algorithms for Time Petri Nets
Fundamenta Informaticae - Concurrency Specification and Programming (CS&P 2003)
Improvements in SAT-based Reachability Analysis for Timed Automata
Fundamenta Informaticae - Concurrency Specification and Programming (CS&P 2003)
ACTLS properties and Bounded Model Checking
Fundamenta Informaticae
Towards SAT-based BMC for LTLK over Interleaved Interpreted Systems
Fundamenta Informaticae - Concurrency Specification and Programming (CS&P)
Autonomous Agents and Multi-Agent Systems
| Hi-index | 0.00 |
The paper deals with the problem of checking reachability for timed automata. The main idea consists in combining the well-know forward reachability algorithm and the Bounded Model Checking (BMC) method. In order to check reachability of a~state satisfying some desired property, first the transition relation of a timed automaton is unfolded iteratively to some depth and encoded as a propositional formula. Next, the desired property is translated to a propositional formula and the satisfiability of the conjunction of the two defined above formulas is checked. The unfolding of the transition relation can be terminated when either a state satisfying the property has been found or all the states of the timed automaton have been searched. The efficiency of the method is strongly supported by the experimental results.