Theoretical Computer Science
A note on reliable full-duplex transmission over half-duplex links
Communications of the ACM
Bounded Model Checking for Timed Systems
FORTE '02 Proceedings of the 22nd IFIP WG 6.1 International Conference Houston on Formal Techniques for Networked and Distributed Systems
Automata For Modeling Real-Time Systems
ICALP '90 Proceedings of the 17th International Colloquium on Automata, Languages and Programming
Model Checking of Real-Time Reachability Properties Using Abstractions
TACAS '98 Proceedings of the 4th International Conference on Tools and Algorithms for Construction and Analysis of Systems
Efficient Verification of Timed Automata Using Dense and Discrete Time Semantics
CHARME '99 Proceedings of the 10th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
Towards Bounded Model Checking for the Universal Fragment of TCTL
FTRTFT '02 Proceedings of the 7th International Symposium on Formal Techniques in Real-Time and Fault-Tolerant Systems: Co-sponsored by IFIP WG 2.2
Improvements in BDD-Based Reachability Analysis of Timed Automata
FME '01 Proceedings of the International Symposium of Formal Methods Europe on Formal Methods for Increasing Software Productivity
Efficient Timed Reachability Analysis Using Clock Difference Diagrams
CAV '99 Proceedings of the 11th International Conference on Computer Aided Verification
ANALYSIS OF ASYNCHRONOUS CONCURRENT SYSTEMS BY TIMED PETRI NETS
ANALYSIS OF ASYNCHRONOUS CONCURRENT SYSTEMS BY TIMED PETRI NETS
√erics: a tool for verifying timed automata and estelle specifications
TACAS'03 Proceedings of the 9th international conference on Tools and algorithms for the construction and analysis of systems
SAT-based Reachability Checking for Timed Automata with Diagonal Constraints
Fundamenta Informaticae - Concurrency Specification and Programming (CS&P 2004)
Improvements in SAT-based Reachability Analysis for Timed Automata
Fundamenta Informaticae - Concurrency Specification and Programming (CS&P 2003)
Checking Reachability Properties for Timed Automata via SAT
Fundamenta Informaticae - Concurrency Specification and Programming (CS&P'2002), Part 2
A Translator of Java Programs to TADDs
Fundamenta Informaticae - Concurrency Specification and Programming (CS&P)
Improving the Translation from ECTL to SAT
Fundamenta Informaticae - Concurrency Specification and Programming (CS&P)
Towards Verification of Java Programs in perICS
Fundamenta Informaticae - Concurrency Specification and Programming (CS&P)
Towards Automatic Composition of Web Services: SAT-Based Concretisation of Abstract Scenarios
Fundamenta Informaticae
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Reachability analysis for timed automata using SAT-based methods was considered in many papers, occurring to be a very efficient model checking technique. In this paper we show how to apply this method of verification to timed automata with discrete data, i.e., to standard timed automata augmented with integer variables. The theoretical description is supported by some preliminary experimental results.