Communicating sequential processes
Communicating sequential processes
Design and validation of computer protocols
Design and validation of computer protocols
Model checking
Bandera: extracting finite-state models from Java source code
Proceedings of the 22nd international conference on Software engineering
Modern Operating Systems
Symbolic Model Checking
ASE '00 Proceedings of the 15th IEEE international conference on Automated software engineering
Towards Verification of Java Programs in perICS
Fundamenta Informaticae - Concurrency Specification and Programming (CS&P)
√erics: a tool for verifying timed automata and estelle specifications
TACAS'03 Proceedings of the 9th international conference on Tools and algorithms for the construction and analysis of systems
SAT-Based Reachability Checking for Timed Automata with Discrete Data
Fundamenta Informaticae - Special Issue on Concurrency Specification and Programming (CS&P)
Slicing of Timed Automata with Discrete Data
Fundamenta Informaticae - SPECIAL ISSUE ON CONCURRENCY SPECIFICATION AND PROGRAMMING (CS&P 2005) Ruciane-Nide, Poland, 28-30 September 2005
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The model checking tools Uppaal and VerICS accept a description of a network of Timed Automata with Discrete Data (TADDs) as input. Thus, to verify a concurrent programwritten in Java by means of these tools, first a TADD model of the program must be build. Therefore, we have developed the J2TADD tool that translates a Java program to a network of TADDs; the paper presents this tool. The J2TADD tool works in two stages. The first one consists in translation of a Java code to an internal assembly language (IAL). Then, the resulting assembly code is translated to a network of TADDs. We exemplify the use of the translator by means of the following well-known concurrency examples written in Java: race condition problem, dining philosophers problem, single sleeping barber problem and readers and writers problem.