Slicing of Timed Automata with Discrete Data

Authors:
Agata Janowska;Paweł Janowski
Affiliations:
Institute of Informatics Warsaw University Banacha 2, 02-097 Warsaw, Poland. E-mail: {janowska,janowski}@mimuw.edu.pl;Institute of Informatics Warsaw University Banacha 2, 02-097 Warsaw, Poland. E-mail: {janowska,janowski}@mimuw.edu.pl
Venue:
Fundamenta Informaticae - SPECIAL ISSUE ON CONCURRENCY SPECIFICATION AND PROGRAMMING (CS&P 2005) Ruciane-Nide, Poland, 28-30 September 2005
Year:
2006

Citing 15
Cited 5

Symbolic model checking for real-time systems

Information and Computation
The Model Checker SPIN

IEEE Transactions on Software Engineering - Special issue on formal methods in software practice
A partial order approach to branching time logic model checking

Information and Computation
A note on reliable full-duplex transmission over half-duplex links

Communications of the ACM
Analysis of Timed Systems Using Time-Abstracting Bisimulations

Formal Methods in System Design
Abstract interpretation: a unified lattice model for static analysis of programs by construction or approximation of fixpoints

POPL '77 Proceedings of the 4th ACM SIGACT-SIGPLAN symposium on Principles of programming languages
Automata For Modeling Real-Time Systems

ICALP '90 Proceedings of the 17th International Colloquium on Automata, Languages and Programming
Using Static Analysis to Improve Automatic Test Generation

TACAS '00 Proceedings of the 6th International Conference on Tools and Algorithms for Construction and Analysis of Systems: Held as Part of the European Joint Conferences on the Theory and Practice of Software, ETAPS 2000
Improving the Verification of Timed Systems Using Influence Information

TACAS '02 Proceedings of the 8th International Conference on Tools and Algorithms for the Construction and Analysis of Systems
A Formal Study of Slicing for Multi-threaded Programs with JVM Concurrency Primitives

SAS '99 Proceedings of the 6th International Symposium on Static Analysis
Design and Synthesis of Synchronization Skeletons Using Branching-Time Temporal Logic

Logic of Programs, Workshop
Reducing the number of clock variables of timed automata

RTSS '96 Proceedings of the 17th IEEE Real-Time Systems Symposium
Static guard analysis in timed automata verification

TACAS'03 Proceedings of the 9th international conference on Tools and algorithms for the construction and analysis of systems
Program Slicing

IEEE Transactions on Software Engineering
Slicing Timed Systems

Fundamenta Informaticae - Concurrency Specification and Programming (CS&P 2003)

A Translator of Java Programs to TADDs

Fundamenta Informaticae - Concurrency Specification and Programming (CS&P)
Translation of Timed Promela to Timed Automata with Discrete Data

Fundamenta Informaticae - Concurrency Specification and Programming (CS&P)
Towards Verification of Java Programs in perICS

Fundamenta Informaticae - Concurrency Specification and Programming (CS&P)
Path Compression in Timed Automata

Fundamenta Informaticae - Special Issue on Concurrency Specification and Programming (CS&P)
State-based model slicing: A survey

ACM Computing Surveys (CSUR)

Quantified Score

Hi-index	0.00

Visualization

Abstract

The paper proposes how to use static analysis to extract an abstract model of a system. The method uses techniques of program slicing to examine syntax of a system modeled as a set of timed automata with discrete data, a common input formalism of model checkers dealing with time. The method is property driven. The abstraction is exact with respect to all properties expressed in the temporal logic CTL$_{-X}$*.