On probabilistic timed automata
Theoretical Computer Science
Formal Verification of UML Statecharts with Real-Time Extensions
FASE '02 Proceedings of the 5th International Conference on Fundamental Approaches to Software Engineering
Automatic verification of real-time communicating systems by constraint-solving
Proceedings of the 7th IFIP WG6.1 International Conference on Formal Description Techniques VII
Automata For Modeling Real-Time Systems
ICALP '90 Proceedings of the 17th International Colloquium on Automata, Languages and Programming
Simple Linear-Time Algorithms for Minimal Fixed Points (Extended Abstract)
ICALP '98 Proceedings of the 25th International Colloquium on Automata, Languages and Programming
The Bounded Retransmission Protocol Must Be on Time!
TACAS '97 Proceedings of the Third International Workshop on Tools and Algorithms for Construction and Analysis of Systems
Formal Design and Analysis of a Gear Controller
TACAS '98 Proceedings of the 4th International Conference on Tools and Algorithms for Construction and Analysis of Systems
On Memory-Block Traversal Problems in Model-Checking Timed-Systems
TACAS '00 Proceedings of the 6th International Conference on Tools and Algorithms for Construction and Analysis of Systems: Held as Part of the European Joint Conferences on the Theory and Practice of Software, ETAPS 2000
Efficient Guiding Towards Cost-Optimality in UPPAAL
TACAS 2001 Proceedings of the 7th International Conference on Tools and Algorithms for the Construction and Analysis of Systems
TIMES - A Tool for Modelling and Implementation of Embedded Systems
TACAS '02 Proceedings of the 8th International Conference on Tools and Algorithms for the Construction and Analysis of Systems
Timed Automata with Asynchronous Processes: Schedulability and Decidability
TACAS '02 Proceedings of the 8th International Conference on Tools and Algorithms for the Construction and Analysis of Systems
Minimum-Cost Reachability for Priced Timed Automata
HSCC '01 Proceedings of the 4th International Workshop on Hybrid Systems: Computation and Control
Efficient Timed Reachability Analysis Using Clock Difference Diagrams
CAV '99 Proceedings of the 11th International Conference on Computer Aided Verification
Model-Checking for Real-Time Systems
FCT '95 Proceedings of the 10th International Symposium on Fundamentals of Computation Theory
Formal Verification of a TDMA Protocol Start-Up Mechanism
PRFTS '97 Proceedings of the 1997 Pacific Rim International Symposium on Fault-Tolerant Systems
Efficient verification of real-time systems: compact data structure and state-space reduction
RTSS '97 Proceedings of the 18th IEEE Real-Time Systems Symposium
A Practical Nonblocking Queue Algorithm Using Compare-and-Swap
ICPADS '00 Proceedings of the Seventh International Conference on Parallel and Distributed Systems
A Test Case Generation Algorithm for Real-Time Systems
QSIC '04 Proceedings of the Quality Software, Fourth International Conference
Testing real-time embedded software using UPPAAL-TRON: an industrial case study
Proceedings of the 5th ACM international conference on Embedded software
Efficient on-the-fly algorithms for the analysis of timed games
CONCUR 2005 - Concurrency Theory
Analysis of the zeroconf protocol using UPPAAL
EMSOFT '06 Proceedings of the 6th ACM & IEEE International conference on Embedded software
Using model checkers in an introductory course on operating systems
ACM SIGOPS Operating Systems Review
Component-Based Design and Analysis of Embedded Systems with UPPAAL PORT
ATVA '08 Proceedings of the 6th International Symposium on Automated Technology for Verification and Analysis
Efficient on-the-fly Algorithm for Checking Alternating Timed Simulation
FORMATS '09 Proceedings of the 7th International Conference on Formal Modeling and Analysis of Timed Systems
Analysis of a Clock Synchronization Protocol for Wireless Sensor Networks
FM '09 Proceedings of the 2nd World Congress on Formal Methods
Unification & sharing in timed automata verification
SPIN'03 Proceedings of the 10th international conference on Model checking software
UPPAAL-Tiga: time for playing games!
CAV'07 Proceedings of the 19th international conference on Computer aided verification
Timed control with observation based and stuttering invariant strategies
ATVA'07 Proceedings of the 5th international conference on Automated technology for verification and analysis
Partial order reduction for verification of real-time components
FORMATS'07 Proceedings of the 5th international conference on Formal modeling and analysis of timed systems
Guided controller synthesis for climate controller using UPPAAL TIGA
FORMATS'07 Proceedings of the 5th international conference on Formal modeling and analysis of timed systems
Modelling and analysis of a commercial field bus protocol
Euromicro-RTS'00 Proceedings of the 12th Euromicro conference on Real-time systems
Priced timed automata: algorithms and applications
FMCO'04 Proceedings of the Third international conference on Formal Methods for Components and Objects
Model checking timed automata with priorities using DBM subtraction
FORMATS'06 Proceedings of the 4th international conference on Formal Modeling and Analysis of Timed Systems
Online testing of real-time systems using UPPAAL
FATES'04 Proceedings of the 4th international conference on Formal Approaches to Software Testing
Symbolic and compositional reachability for timed automata
RP'10 Proceedings of the 4th international conference on Reachability problems
Synthia: verification and synthesis for timed automata
CAV'11 Proceedings of the 23rd international conference on Computer aided verification
Multi-core reachability for timed automata
FORMATS'12 Proceedings of the 10th international conference on Formal Modeling and Analysis of Timed Systems
Reachability analysis of nonlinear systems using conservative polynomialization and non-convex sets
Proceedings of the 16th international conference on Hybrid systems: computation and control
Robust synthesis for real-time systems
Theoretical Computer Science
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UPPAAL is a tool suitable for model checking real-time systems described as networks of timed automata communicating by channel synchronizations and extended with integer variables. Its first version was released in 1995 and its development is still very active. It now features an advanced modeling language, a user-friendly graphical interface, and a performant model checker engine. In addition, several flavors of the tool have matured in recent years. In this paper, we present how we managed to maintain the tool during 15 years, its current architecture with its challenges, and we give the future directions of the tool. Copyright © 2011 John Wiley & Sons, Ltd.