Theoretical Computer Science
UPPAAL-Tiga: time for playing games!
CAV'07 Proceedings of the 19th international conference on Computer aided verification
Combining symbolic representations for solving timed games
FORMATS'10 Proceedings of the 8th international conference on Formal modeling and analysis of timed systems
Developing UPPAAL over 15 years
Software—Practice & Experience
Template-Based controller synthesis for timed systems
TACAS'12 Proceedings of the 18th international conference on Tools and Algorithms for the Construction and Analysis of Systems
Model-based synthesis of control software from system-level formal specifications
ACM Transactions on Software Engineering and Methodology (TOSEM)
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We present Synthia, a new tool for the verification and synthesis of open real-time systems modeled as timed automata. The key novelty of Synthia is the underlying abstraction refinement approach [5] that combines the efficient symbolic treatment of timing information by difference bound matrices (DBMs) with the usage of binary decision diagrams (BDDs) for the discrete parts of the system description. Our experiments show that the analysis of both closed and open systems greatly benefits from identifying large relevant and irrelevant system parts on coarse abstractions early in the solution process. Synthia is licensed under the GNU GPL and available from our website.