Timing assumptions and verification of finite-state concurrent systems
Proceedings of the international workshop on Automatic verification methods for finite state systems
Automata for modeling real-time systems
Proceedings of the seventeenth international colloquium on Automata, languages and programming
Theoretical Computer Science
Symbolic approximations for verifying real-time systems
Symbolic approximations for verifying real-time systems
Proceedings of the DIMACS/SYCON workshop on Hybrid systems III : verification and control: verification and control
An Efficient Algorithm for Minimizing Real-Time Transition Systems
Formal Methods in System Design - Special issue on computer aided verification (CAV 93)
Characterization of the expressive power of silent transitions in timed automata
Fundamenta Informaticae
Model checking
Timed automata with periodic clock constraints
Journal of Automata, Languages and Combinatorics
Analysis of Timed Systems Using Time-Abstracting Bisimulations
Formal Methods in System Design
The Expressive Power of Clocks
ICALP '95 Proceedings of the 22nd International Colloquium on Automata, Languages and Programming
The Regular Real-Time Languages
ICALP '98 Proceedings of the 25th International Colloquium on Automata, Languages and Programming
Model Checking of Real-Time Reachability Properties Using Abstractions
TACAS '98 Proceedings of the 4th International Conference on Tools and Algorithms for Construction and Analysis of Systems
STACS '03 Proceedings of the 20th Annual Symposium on Theoretical Aspects of Computer Science
CONCUR '98 Proceedings of the 9th International Conference on Concurrency Theory
The Observational Power of Clocks
CONCUR '94 Proceedings of the Concurrency Theory
Specifying Timed State Sequences in Powerful Decidable Logics and Timed Automata
ProCoS Proceedings of the Third International Symposium Organized Jointly with the Working Group Provably Correct Systems on Formal Techniques in Real-Time and Fault-Tolerant Systems
Counterexample-Guided Abstraction Refinement
CAV '00 Proceedings of the 12th International Conference on Computer Aided Verification
CAV '00 Proceedings of the 12th International Conference on Computer Aided Verification
A Determinizable Class of Timed Automata
CAV '94 Proceedings of the 6th International Conference on Computer Aided Verification
Lectures on Embedded Systems, European Educational Forum, School on Embedded Systems
Verification of the Fast Reservation Protocol with Delayed Transmission using the Tool Kronos
RTAS '98 Proceedings of the Fourth IEEE Real-Time Technology and Applications Symposium
Formal modeling and analysis of an audio/video protocol: an industrial case study using UPPAAL
RTSS '97 Proceedings of the 18th IEEE Real-Time Systems Symposium
On-the-fly symbolic model checking for real-time systems
RTSS '97 Proceedings of the 18th IEEE Real-Time Systems Symposium
Modal logics for timed control
CONCUR 2005 - Concurrency Theory
Timed substitutions for regular signal-event languages
Formal Methods in System Design
When are Timed Automata weakly timed bisimilar to Time Petri Nets?
Theoretical Computer Science
Universality Analysis for One-Clock Timed Automata
Fundamenta Informaticae - Fundamentals of Software Engineering 2007: Selected Contributions
Checking timed Büchi automata emptiness on simulation graphs
ACM Transactions on Computational Logic (TOCL)
FOSSACS '09 Proceedings of the 12th International Conference on Foundations of Software Science and Computational Structures: Held as Part of the Joint European Conferences on Theory and Practice of Software, ETAPS 2009
Conformance testing for real-time systems
Formal Methods in System Design
Checking Timed Büchi Automata Emptiness Using LU-Abstractions
FORMATS '09 Proceedings of the 7th International Conference on Formal Modeling and Analysis of Timed Systems
Testing Real-Time Systems Using TINA
TESTCOM '09/FATES '09 Proceedings of the 21st IFIP WG 6.1 International Conference on Testing of Software and Communication Systems and 9th International FATES Workshop
Weighted Timed Automata: Model-Checking and Games
Electronic Notes in Theoretical Computer Science (ENTCS)
Weak bisimulation for Probabilistic Timed Automata
Theoretical Computer Science
Efficient on-the-fly emptiness check for timed Büchi automata
ATVA'10 Proceedings of the 8th international conference on Automated technology for verification and analysis
Quantitative analysis of real-time systems using priced timed automata
Communications of the ACM
Coarse abstractions make zeno behaviours difficult to detect
CONCUR'11 Proceedings of the 22nd international conference on Concurrency theory
Event clock automata: from theory to practice
FORMATS'11 Proceedings of the 9th international conference on Formal modeling and analysis of timed systems
Diagonal constraints in timed automata: forward analysis of timed systems
FORMATS'05 Proceedings of the Third international conference on Formal Modeling and Analysis of Timed Systems
Intersection of regular signal-event (timed) languages
FORMATS'06 Proceedings of the 4th international conference on Formal Modeling and Analysis of Timed Systems
Efficient emptiness check for timed büchi automata
CAV'10 Proceedings of the 22nd international conference on Computer Aided Verification
HSCC'05 Proceedings of the 8th international conference on Hybrid Systems: computation and control
Interrupt Timed Automata: verification and expressiveness
Formal Methods in System Design
Timed unfoldings for networks of timed automata
ATVA'06 Proceedings of the 4th international conference on Automated Technology for Verification and Analysis
Symbolic unfoldings for networks of timed automata
ATVA'06 Proceedings of the 4th international conference on Automated Technology for Verification and Analysis
Efficient emptiness check for timed Büchi automata
Formal Methods in System Design
On decidability of prebisimulation for timed automata
CAV'12 Proceedings of the 24th international conference on Computer Aided Verification
Universality Analysis for One-Clock Timed Automata
Fundamenta Informaticae - Fundamentals of Software Engineering 2007: Selected Contributions
Multi-core reachability for timed automata
FORMATS'12 Proceedings of the 10th international conference on Formal Modeling and Analysis of Timed Systems
Hi-index | 0.02 |
Timed automata are a widely studied model. Its decidability has been proved using the so-called region automaton construction. This construction provides a correct abstraction for the behaviours of timed automata, but it suffers from a state explosion and is thus not used in practice. Instead, algorithms based on the notion of zones are implemented using adapted data structures like DBMs. When we focus on forward analysis algorithms, the exact computation of all the successors of the initial configurations does not always terminate. Thus, some abstractions are often used to ensure termination, among which, a widening operator on zones.In this paper, we study in detail this widening operator and the corresponding forward analysis algorithm. This algorithm is most used and implemented in tools like KRONOS and UPPAAL. One of our main results is that it is hopeless to find a forward analysis algorithm for general timed automata, that uses such a widening operator, and which is correct. This goes really against what one could think. We then study in detail this algorithm in the more general framework of updatable timed automata, a model which has been introduced as a natural syntactic extension of classical timed automata. We describe subclasses of this model for which a correct widening operator can be found.