Theoretical Computer Science
Model Checking of Real-Time Reachability Properties Using Abstractions
TACAS '98 Proceedings of the 4th International Conference on Tools and Algorithms for Construction and Analysis of Systems
Timing Assumptions and Verification of Finite-State Concurrent Systems
Proceedings of the International Workshop on Automatic Verification Methods for Finite State Systems
Kronos: A Model-Checking Tool for Real-Time Systems
CAV '98 Proceedings of the 10th International Conference on Computer Aided Verification
Verifying Progress in Timed Systems
ARTS '99 Proceedings of the 5th International AMAST Workshop on Formal Methods for Real-Time and Probabilistic Systems
Formal modeling and analysis of an audio/video protocol: an industrial case study using UPPAAL
RTSS '97 Proceedings of the 18th IEEE Real-Time Systems Symposium
Forward Analysis of Updatable Timed Automata
Formal Methods in System Design
Checking Timed Büchi Automata Emptiness Efficiently
Formal Methods in System Design
QEST '06 Proceedings of the 3rd international conference on the Quantitative Evaluation of Systems
Checking timed Büchi automata emptiness on simulation graphs
ACM Transactions on Computational Logic (TOCL)
Efficient detection of Zeno runs in timed automata
FORMATS'07 Proceedings of the 5th international conference on Formal modeling and analysis of timed systems
Guided controller synthesis for climate controller using UPPAAL TIGA
FORMATS'07 Proceedings of the 5th international conference on Formal modeling and analysis of timed systems
A note on on-the-fly verification algorithms
TACAS'05 Proceedings of the 11th international conference on Tools and Algorithms for the Construction and Analysis of Systems
Efficient on-the-fly emptiness check for timed Büchi automata
ATVA'10 Proceedings of the 8th international conference on Automated technology for verification and analysis
Coarse abstractions make zeno behaviours difficult to detect
CONCUR'11 Proceedings of the 22nd international conference on Concurrency theory
FORMATS'12 Proceedings of the 10th international conference on Formal Modeling and Analysis of Timed Systems
Symbolic model-checking of stateful timed CSP using BDD and digitization
ICFEM'12 Proceedings of the 14th international conference on Formal Engineering Methods: formal methods and software engineering
Modeling and verifying hierarchical real-time systems using stateful timed CSP
ACM Transactions on Software Engineering and Methodology (TOSEM)
Synthesis of memory-efficient, clock-memory free, and non-Zeno safety controllers for timed systems
Information and Computation
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The Büchi non-emptiness problem for timed automata concerns deciding if a given automaton has an infinite non-Zeno run satisfying the Büchi accepting condition The standard solution to this problem involves adding an auxiliary clock to take care of the non-Zenoness In this paper, we show that this simple transformation may sometimes result in an exponential blowup We propose a method avoiding this blowup.