Using FPGA for computer architecture/organization education

  • Authors:
  • Yamin Li;Wanming Chu

  • Affiliations:
  • University of Aizu, Aizu-Wakamatsu, Japan;University of Aizu, Aizu-Wakamatsu, Japan

  • Venue:
  • WCAE-2 '96 Proceedings of the 1996 workshop on Computer architecture education
  • Year:
  • 1996

Quantified Score

Hi-index 0.00

Visualization

Abstract

In this paper, we introduce hardware exercises for Computer Architecture/Organization Education at the University of Aizu, Japan. Particularly, we discuss a pipelined RISC processor design and implementation on Xilinx FPGA chip.