Code generation for STA architecture

Authors:
J. Guo;T. Limberg;E. Matus;B. Mennenga;R. Klemm;G. Fettweis
Affiliations:
Vodafone Chair Mobile Communication Systems, TU Dresden, Germany;Vodafone Chair Mobile Communication Systems, TU Dresden, Germany;Vodafone Chair Mobile Communication Systems, TU Dresden, Germany;Vodafone Chair Mobile Communication Systems, TU Dresden, Germany;Vodafone Chair Mobile Communication Systems, TU Dresden, Germany;Vodafone Chair Mobile Communication Systems, TU Dresden, Germany
Venue:
Euro-Par'06 Proceedings of the 12th international conference on Parallel Processing
Year:
2006

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Abstract

This paper presents a novel compiler backend which generates assembly code for Synchronous Transfer Architecture (STA). STA is a Very Long Instruction Word (VLIW) architecture and in addition it uses a non-orthogonal Instruction Set Architecture (ISA). Generating efficient code for this architecture needs highly optimizing techniques. The compiler backend presented in this paper is based on Integer Linear Programming (ILP). Experimental results show that the generated assembly code consumes much less execution time than the code generated by traditional ways, and the code generation can be accomplished in acceptable time.