Small forwarding tables for fast routing lookups
SIGCOMM '97 Proceedings of the ACM SIGCOMM '97 conference on Applications, technologies, architectures, and protocols for computer communication
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Computer architecture (2nd ed.): a quantitative approach
PATRICIA—Practical Algorithm To Retrieve Information Coded in Alphanumeric
Journal of the ACM (JACM)
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Probability and statistics with reliability, queuing and computer science applications
Probability and statistics with reliability, queuing and computer science applications
Numerical Recipes in C++: the art of scientific computing
Numerical Recipes in C++: the art of scientific computing
Introduction to Algorithms
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Fast Updating Algorithms for TCAMs
IEEE Micro
Routing Table Compaction in Ternary CAM
IEEE Micro
Reducing TCAM Power Consumption and Increasing Throughput
HOTI '02 Proceedings of the 10th Symposium on High Performance Interconnects HOT Interconnects
CoPTUA: Consistent Policy Table Update Algorithm for TCAM without Locking
IEEE Transactions on Computers
IP-address lookup using LC-tries
IEEE Journal on Selected Areas in Communications
Scalable IP lookup for Internet routers
IEEE Journal on Selected Areas in Communications
Multi-terabit ip lookup using parallel bidirectional pipelines
Proceedings of the 5th conference on Computing frontiers
Sequence-preserving parallel IP lookup using multiple SRAM-based pipelines
Journal of Parallel and Distributed Computing
A Hybrid IP Forwarding Engine with High Performance and Low Power
ICCSA '09 Proceedings of the International Conference on Computational Science and Its Applications: Part II
A TCAM-based solution for integrated traffic anomaly detection and policy filtering
Computer Communications
A performance analysis framework for routing lookup in scalable routers
ICOIN'09 Proceedings of the 23rd international conference on Information Networking
Flashlook: 100-Gbps hash-tuned route lookup architecture
HPSR'09 Proceedings of the 15th international conference on High Performance Switching and Routing
Flashtrie: hash-based prefix-compressed trie for IP route lookup beyond 100Gbps
INFOCOM'10 Proceedings of the 29th conference on Information communications
A memory-efficient pipelined implementation of the aho-corasick string-matching algorithm
ACM Transactions on Architecture and Code Optimization (TACO)
Power-Aware TCAMs for Routing Table Lookup
GREENCOM-CPSCOM '10 Proceedings of the 2010 IEEE/ACM Int'l Conference on Green Computing and Communications & Int'l Conference on Cyber, Physical and Social Computing
ERID: edge router identification for fast forwarding packet in BGP domain
ICHIT'11 Proceedings of the 5th international conference on Convergence and hybrid information technology
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Scalable architecture for 135 GBPS IPv6 lookup on FPGA (abstract only)
Proceedings of the ACM/SIGDA international symposium on Field Programmable Gate Arrays
Bit weaving: a non-prefix approach to compressing packet classifiers in TCAMs
IEEE/ACM Transactions on Networking (TON)
Cross-layer end-to-end label switching protocol for WiMAX-MPLS heterogeneous networks
Journal of Systems and Software
FlashTrie: beyond 100-Gb/s IP route lookup using hash-based prefix-compressed trie
IEEE/ACM Transactions on Networking (TON)
Towards TCAM-based scalable virtual routers
Proceedings of the 8th international conference on Emerging networking experiments and technologies
Scalable high-throughput architecture for large balanced tree structures on FPGA (abstract only)
Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays
A comprehensive performance analysis of virtual routers on FPGA
ACM Transactions on Reconfigurable Technology and Systems (TRETS) - Special Section on 19th Reconfigurable Architectures Workshop (RAW 2012)
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Using ternary content addressable memory (TCAM) for high-speed IP address lookup has been gaining popularity due to its deterministic high performance. However, restricted by the slow improvement of memory accessing speed, the route lookup engines for next-generation terabit routers demand exploiting parallelism among multiple TCAM chips. Traditional parallel methods always incur excessive redundancy and high power consumption. We propose in this paper an original TCAM-based IP lookup scheme that achieves both ultra-high lookup throughput and optimal utilization of the memory while being power-efficient. In our multi-chip scheme, we devise a load-balanced TCAM table construction algorithm together with an adaptive load balancing mechanism. The power efficiency is well controlled by decreasing the number of TCAM entries triggered in each lookup operation. Using four 133 MHz TCAM chips and given 25% more TCAM entries than the original route table, the proposed scheme achieves a lookup throughput of up to 533 MPPS while remains simple for ASIC implementation.