Active messages: a mechanism for integrated communication and computation
ISCA '92 Proceedings of the 19th annual international symposium on Computer architecture
A Family of Fault-Tolerant Routing Protocols for Direct Multiprocessor Networks
IEEE Transactions on Parallel and Distributed Systems
The SP2 high-performance switch
IBM Systems Journal
Configurable flow control mechanisms for fault-tolerant routing
ISCA '95 Proceedings of the 22nd annual international symposium on Computer architecture
The Mercury Interconnect Architecture: a cost-effective infrastructure for high-performance servers
Proceedings of the 24th annual international symposium on Computer architecture
Generating representative Web workloads for network and server performance evaluation
SIGMETRICS '98/PERFORMANCE '98 Proceedings of the 1998 ACM SIGMETRICS joint international conference on Measurement and modeling of computer systems
Switcherland: a QoS communication architecture for workstation clusters
Proceedings of the 25th annual international symposium on Computer architecture
Computer architecture (2nd ed.): a quantitative approach
Computer architecture (2nd ed.): a quantitative approach
High-Performance Routing in Networks of Workstations with Irregular Topology
IEEE Transactions on Parallel and Distributed Systems
Journal of Parallel and Distributed Computing
Internetworking with TCP/IP, Volume 1: Principles, Protocols, and Architectures, Fourth Edition
Internetworking with TCP/IP, Volume 1: Principles, Protocols, and Architectures, Fourth Edition
Computer Networking: A Top-Down Approach Featuring the Internet Package
Computer Networking: A Top-Down Approach Featuring the Internet Package
Symmetric Crossbar Arbiters for VLSI Communication Switches
IEEE Transactions on Parallel and Distributed Systems
Tuning Buffer Size in the Multimedia Router (MMR)
IPDPS '01 Proceedings of the 15th International Parallel & Distributed Processing Symposium
Investigating Switch Scheduling Algorithms to Support QoS in the Multimedia Router
IPDPS '02 Proceedings of the 16th International Parallel and Distributed Processing Symposium
ATLAS: A Single-Chip ATM Switch for NOWs
CANPC '97 Proceedings of the First International Workshop on Communication and Architectural Support for Network-Based Parallel Computing
A Cost-Effective Hardware Link Scheduling Algorithm for the Multimedia Router (MMR)
ICN '01 Proceedings of the First International Conference on Networking-Part 2
A Strategy to Manage Time Sensitive Traffic in InfiniBand
IPDPS '02 Proceedings of the 16th International Parallel and Distributed Processing Symposium
MMR: A High-Performance Multimedia Router - Architecture and Design Trade-Offs
HPCA '99 Proceedings of the 5th International Symposium on High Performance Computer Architecture
Switch Scheduling in the Multimedia Router (MMR)
IPDPS '00 Proceedings of the 14th International Symposium on Parallel and Distributed Processing
Providing bandwidth guarantees in an input-buffered crossbar switch
INFOCOM '95 Proceedings of the Fourteenth Annual Joint Conference of the IEEE Computer and Communication Societies (Vol. 3)-Volume - Volume 3
Traffic scheduling in packet-switched networks: analysis, design, and implementation
Traffic scheduling in packet-switched networks: analysis, design, and implementation
Bandwidth and latency guarantees in low-cost, high-performance networks
Bandwidth and latency guarantees in low-cost, high-performance networks
High Performance Messaging on Workstations: Illinois Fast Messages (FM) for Myrinet
Supercomputing '95 Proceedings of the 1995 ACM/IEEE conference on Supercomputing
Traffic Scheduling Solutions with QoS Support for an Input-Buffered MultiMedia Router
IEEE Transactions on Parallel and Distributed Systems
On the provision of quality-of-service guarantees for input queued switches
IEEE Communications Magazine
Loss-resilient ATM protocol architecture for MPEG-2 video communications
IEEE Journal on Selected Areas in Communications
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During the past few years, multimedia traffic with quality of service (QoS) requirements has become of widespread use. Media servers are usually built as clusters of workstations connected by a high-performance interconnection network. However, these high-performance networks do not usually offer differentiated support for multimedia traffic. The MultiMedia Router (MMR) is a proposal to address the QoS issue in cluster networks within a compact architecture, while also integrating conventional best-effort traffic. This paper describes the main architectural features of the MMR, such as the use of a hybrid switching technique, credit-based flow control, or small input buffers. Also, the main design parameters are tuned by means of simulation. It can be seen how proper differentiation among the different traffic classes is achieved, while retaining a compact design with small buffers.