Switch Scheduling in the Multimedia Router (MMR)

Authors:
D. Love
Affiliations:
-
Venue:
IPDPS '00 Proceedings of the 14th International Symposium on Parallel and Distributed Processing
Year:
2000

Citing 0
Cited 7

Algorithms for Switch-Scheduling in the Multimedia Router for LANs

HiPC '02 Proceedings of the 9th International Conference on High Performance Computing
Tuning Buffer Size in the Multimedia Router (MMR)

IPDPS '01 Proceedings of the 15th International Parallel & Distributed Processing Symposium
Investigating Switch Scheduling Algorithms to Support QoS in the Multimedia Router

IPDPS '02 Proceedings of the 16th International Parallel and Distributed Processing Symposium
Traffic Scheduling Solutions with QoS Support for an Input-Buffered MultiMedia Router

IEEE Transactions on Parallel and Distributed Systems
MMR: A MultiMedia Router architecture to support hybrid workloads

Journal of Parallel and Distributed Computing
A two-stage hardware scheduler combining greedy and optimal scheduling

Journal of Parallel and Distributed Computing
A new hardware efficient link scheduling algorithm to guarantee qos on clusters

Euro-Par'05 Proceedings of the 11th international Euro-Par conference on Parallel Processing

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Abstract

This paper examines two Network Interface Card micro-architectures that support low latency, high bandwidth user-level message passing in multi-user environments. The two are at different ends of a design spectrum -- the Resident queues design relies ...