Characterizing computer performance with a single number
Communications of the ACM
The AlphaServer 8000 series: high-end server platform development
Digital Technical Journal - Special 10th anniversary issue
Computer architecture (2nd ed.): a quantitative approach
Computer architecture (2nd ed.): a quantitative approach
A low-cost memory architecture for PCI-based interactive ray casting
HWWS '99 Proceedings of the ACM SIGGRAPH/EUROGRAPHICS workshop on Graphics hardware
Microprocessor system buses: a case study
Journal of Systems Architecture: the EUROMICRO Journal - Special double issue on microprocessor architecture
PCI System Architecture
The Anatomy of a High Performance Microprocessor (Interactive Book/CD-ROM): A Systems Perspective with Cdrom
Memory Channel Network for PCI
IEEE Micro
SONIC - A Plug-In Architecture for Video Processing
FCCM '99 Proceedings of the Seventh Annual IEEE Symposium on Field-Programmable Custom Computing Machines
PCI-PipeRench and the SWORDAPI: A System for Stream-Based Reconfigurable Computing
FCCM '99 Proceedings of the Seventh Annual IEEE Symposium on Field-Programmable Custom Computing Machines
Sepia: Scalable 3D Compositing Using PCI Pamette
FCCM '99 Proceedings of the Seventh Annual IEEE Symposium on Field-Programmable Custom Computing Machines
A PCI Bus Based Correlation Matrix Memory and Its Application to k-NN Classification
MICRONEURO '99 Proceedings of the 7th International Conference on Microelectronics for Neural, Fuzzy and Bio-Inspired Systems
Design and Implementation of a High-Speed ATM Host Interface Controller
ICOIN '98 Proceedings of the 13th International Conference on Information Networking
System performance evaluation by combining RTC and VHDL simulation: A case study on NICs
Journal of Systems Architecture: the EUROMICRO Journal
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We describe a simulation environment that allows us to simulate the standard peripheral component interconnect (PCI) bus protocol, as well as modified PCI protocols. While there are standard benchmarks (such as the SPEC [IEEE Comput. 33 (7) (2000) 28] benchmarks) available for processor simulation, database system simulation, and now even for simulating embedded systems (from EDN Embedded Microprocessor Benchmarking Consortium, EEMBC, http:// www.eembc.org), there are no standard benchmarks for simulating computer buses in general and specifically, for simulating the PCI bus. To address this problem we describe a methodology for gathering information about the PCI traffic from a real system, and to use this information in order to generate PCI cycles that drive the simulator for both standard and modified PCI protocols. Finally, we use the simulation environment to run experiments with various parameters of the standard PCI protocols, and an extension that involves transferring a hint about the expected latency on the data bus at the time the target ends the current burst transaction.