Introduction to statistical pattern recognition (2nd ed.)
Introduction to statistical pattern recognition (2nd ed.)
Machine learning, neural and statistical classification
Machine learning, neural and statistical classification
Distributed associative memories for high-speed symbolic reasoning
Fuzzy Sets and Systems - Special issue on connectionist and hybrid connectionist systems for approximate reasoning
Matching performance of binary correlation matrix memories
Transactions of the Society for Computer Simulation International - Special issue: simulation methodology in transportation systems
A high performance k-NN classifier using a binary correlation matrix memory
Proceedings of the 1998 conference on Advances in neural information processing systems II
A PCI bus simulation framework and some simulation results on PCI Standard 2.1 latency limitations
Journal of Systems Architecture: the EUROMICRO Journal
Mapping Correlation Matrix Memory Applications onto a Beowulf Cluster
ICANN '01 Proceedings of the International Conference on Artificial Neural Networks
A hardware-accelerated novel IR system
EUROMICRO-PDP'02 Proceedings of the 10th Euromicro conference on Parallel, distributed and network-based processing
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This paper describes a PCI bus based implementation of a binary correlation matrix memory (CMM) neural network and its application and performance for use as a k-NN based pattern classification system. The system expands on earlier VME based system incorporating FPGA based implementation through greater integration and lower cost. Experimental results for several benchmarks show that, compared with a simple k-NN method, the CMM hardware gave speed up of 8-98.8 times during recall process with a classification performance which is 99%-100% that of a conventional k-NN implementation.